March 1994
Revised November 1999
74ABT240
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The ABT240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density.
Features
■Output sink capability of 64 mA, source capability of 32 mA
■Guaranteed latchup protection
■High impedance glitch free bus loading during entire power up and power down cycle
■Nondestructive hot insertion capability
Ordering Code:
Order Number |
Package Number |
Package Description |
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74ABT240CSC |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body |
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74ABT240CSJ |
M20D |
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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74ABT240CMSA |
MSA20 |
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide |
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74ABT240CMTC |
MTC20 |
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram |
Pin Descriptions |
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Pin Names |
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Description |
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1, |
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2 |
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3-STATE Output |
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OE |
OE |
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Enable Inputs |
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I0–I7 |
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Inputs |
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7 |
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Outputs |
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O |
0–O |
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Truth Tables |
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Inputs |
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Outputs |
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(Pins 12, 14, 16, 18) |
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OE1 |
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In |
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L |
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L |
H |
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L |
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H |
L |
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H |
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X |
Z |
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Inputs |
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Outputs |
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(Pins 3, 5, 7, 9) |
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OE2 |
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In |
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L |
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L |
H |
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L |
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H |
L |
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H |
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X |
Z |
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H = |
HIGH Voltage Level |
L = |
LOW Voltage Level |
X = |
Immaterial |
Z = |
High Impedance |
Outputs STATE-3 with Driver Buffer/Line Octal 74ABT240
© 1999 Fairchild Semiconductor Corporation |
DS011664 |
www.fairchildsemi.com |
74ABT240
Absolute Maximum Ratings(Note 1)
Storage Temperature
Junction Temperature under Bias
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Any Output
in the Disabled or Power-Off State in the HIGH State
Current Applied to Output in LOW State (Max)
DC Latchup Source Current
(Across Comm Operating Range)
Over Voltage Latchup (I/O)
− 40° C to + 85° C
+ 4.5V to + 5.5V
50 mV/ns
20 mV/ns
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol |
Parameter |
Min |
Typ |
Max |
Units |
VCC |
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Conditions |
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VIH |
Input HIGH Voltage |
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2.0 |
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V |
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Recognized HIGH Signal |
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VIL |
Input LOW Voltage |
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0.8 |
V |
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Recognized LOW Signal |
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VCD |
Input Clamp Diode Voltage |
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− 1.2 |
V |
Min |
IIN = |
− 18 mA |
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VOH |
Output HIGH Voltage |
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2.5 |
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V |
Min |
IOH = |
− |
3 mA |
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2.0 |
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V |
Min |
IOH = |
− |
32 mA |
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VOL |
Output LOW Voltage |
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0.55 |
V |
Min |
IOL = |
64 mA |
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IIH |
Input HIGH Current |
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1 |
µ A |
Max |
VIN = |
2.7V (Note 3) |
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1 |
VIN = |
VCC |
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IBVI |
Input HIGH Current Breakdown Test |
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7 |
µ A |
Max |
VIN = |
7.0V |
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IIL |
Input LOW Current |
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− 1 |
µ A |
Max |
VIN = |
0.5V (Note 3) |
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− 1 |
VIN = |
0.0V |
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VID |
Input Leakage Test |
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4.75 |
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V |
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0.0 |
IID = |
1.9 µ A |
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All Other Pins Grounded |
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IOZH |
Output Leakage Current |
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10 |
µ A |
0 − |
5.5V |
VOUT = |
2.7V; |
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2.0V |
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OE |
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IOZL |
Output Leakage Current |
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− 10 |
µ A |
0 − |
5.5V |
VOUT = |
0.5V; |
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n = |
2.0V |
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OE |
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IOS |
Output Short-Circuit Current |
− 100 |
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− 275 |
mA |
Max |
VOUT = |
0.0V |
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ICEX |
Output HIGH Leakage Current |
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50 |
µ A |
Max |
VOUT = |
VCC |
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IZZ |
Bus Drainage Test |
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100 |
µ A |
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0.0 |
VOUT = |
5.5V; All Others GND |
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ICCH |
Power Supply Current |
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50 |
µ A |
Max |
All Outputs HIGH |
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ICCL |
Power Supply Current |
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30 |
mA |
Max |
All Outputs LOW |
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ICCZ |
Power Supply Current |
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50 |
µ A |
Max |
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n = |
VCC; |
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OE |
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All Others at VCC or Ground |
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ICCT |
Additional ICC/Input |
Outputs Enabled |
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1.5 |
mA |
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VI = |
VCC − 2.1V |
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Outputs 3-STATE |
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1.5 |
mA |
Max |
Enable Input VI = VCC − 2.1V |
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Outputs 3-STATE |
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50 |
µ A |
Data Input VI = VCC − 2.1V |
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All Others at VCC or Ground |
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ICCD |
Dynamic ICC |
No Load |
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mA/ |
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Outputs Open |
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(Note 3) |
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0.1 |
MHz |
Max |
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OE |
n = |
GND, (Note 4) |
One Bit Toggling, 50% Duty Cycle
Note 3: Guaranteed, but not tested.
Note 4: For 8 bits toggling, ICCD < 0.8 mA/MHz.
www.fairchildsemi.com |
2 |
AC Electrical Characteristics
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TA = + |
25° C |
TA = − 55° C to + 125° C |
TA = − |
40° C to + |
85° C |
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VCC = |
+ |
5V |
VCC = 4.5V–5.5V |
VCC = 4.5V–5.5V |
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Symbol |
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Parameter |
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CL = 50 pF |
CL = |
50 pF |
CL = 50 pF |
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Units |
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Min |
Typ |
Max |
Min |
Max |
Min |
Max |
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tPLH |
Propagation Delay |
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1.0 |
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4.8 |
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0.8 |
5.5 |
1.0 |
4.8 |
ns |
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tPHL |
Data to Outputs |
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1.6 |
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4.8 |
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1.0 |
5.5 |
1.6 |
4.8 |
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tPZH |
Output Enable |
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1.1 |
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6.2 |
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0.8 |
7.5 |
1.1 |
6.2 |
ns |
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tPZL |
Time |
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1.1 |
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6.2 |
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0.8 |
7.7 |
1.1 |
6.2 |
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tPHZ |
Output Disable |
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1.8 |
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6.4 |
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1.0 |
7.5 |
1.8 |
6.4 |
ns |
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tPLZ |
Time |
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1.6 |
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5.8 |
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1.0 |
7.2 |
1.6 |
5.8 |
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Capacitance |
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Symbol |
Parameter |
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Typ |
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Units |
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Conditions |
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TA = 25° C |
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CIN |
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Input Capacitance |
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5.0 |
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pF |
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VCC = |
0V |
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COUT (Note 5) |
Output Capacitance |
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9.0 |
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pF |
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VCC = |
5.0V |
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Note 5: COUT is measured at frequency f = |
1 MHz, per MIL-STD-883, Method 3012. |
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74ABT240
3 |
www.fairchildsemi.com |