Fairchild Semiconductor 74ABT240CSJX, 74ABT240CSJ, 74ABT240CSCX, 74ABT240CSC, 74ABT240CMTCX Datasheet

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Fairchild Semiconductor 74ABT240CSJX, 74ABT240CSJ, 74ABT240CSCX, 74ABT240CSC, 74ABT240CMTCX Datasheet

March 1994

Revised November 1999

74ABT240

Octal Buffer/Line Driver with 3-STATE Outputs

General Description

The ABT240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density.

Features

Output sink capability of 64 mA, source capability of 32 mA

Guaranteed latchup protection

High impedance glitch free bus loading during entire power up and power down cycle

Nondestructive hot insertion capability

Ordering Code:

Order Number

Package Number

Package Description

 

 

 

74ABT240CSC

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body

 

 

 

74ABT240CSJ

M20D

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

 

 

 

74ABT240CMSA

MSA20

20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide

 

 

 

74ABT240CMTC

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

 

 

 

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Connection Diagram

Pin Descriptions

 

 

 

 

 

 

 

 

 

 

 

Pin Names

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1,

 

 

2

 

 

3-STATE Output

 

 

 

 

OE

OE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Enable Inputs

 

 

 

 

I0–I7

 

Inputs

 

 

 

 

 

 

 

 

7

 

 

Outputs

 

 

 

 

O

0–O

 

 

 

Truth Tables

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Inputs

 

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Pins 12, 14, 16, 18)

 

 

 

OE1

 

In

 

 

 

 

 

L

 

L

H

 

 

 

 

L

 

H

L

 

 

 

 

H

 

X

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Inputs

 

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Pins 3, 5, 7, 9)

 

 

OE2

 

In

 

 

 

 

 

L

 

L

H

 

 

 

 

L

 

H

L

 

 

 

 

H

 

X

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H =

HIGH Voltage Level

L =

LOW Voltage Level

X =

Immaterial

Z =

High Impedance

Outputs STATE-3 with Driver Buffer/Line Octal 74ABT240

© 1999 Fairchild Semiconductor Corporation

DS011664

www.fairchildsemi.com

− 0.5V to 5.5V − 0.5V to VCC
twice the rated IOL (mA)
− 150 mA 10V
− 65° C to + 150° C
− 55° C to + 150° C Free Air Ambient Temperature − 0.5V to + 7.0V Supply Voltage
− 0.5V to + 7.0V Minimum Input Edge Rate (∆ V/∆ t) − 30 mA to + 5.0 mA
Enable Input
Data Input
Recommended Operating Conditions

74ABT240

Absolute Maximum Ratings(Note 1)

Storage Temperature

Junction Temperature under Bias

VCC Pin Potential to Ground Pin

Input Voltage (Note 2)

Input Current (Note 2)

Voltage Applied to Any Output

in the Disabled or Power-Off State in the HIGH State

Current Applied to Output in LOW State (Max)

DC Latchup Source Current

(Across Comm Operating Range)

Over Voltage Latchup (I/O)

− 40° C to + 85° C

+ 4.5V to + 5.5V

50 mV/ns

20 mV/ns

Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.

Note 2: Either voltage limit or current limit is sufficient to protect inputs.

DC Electrical Characteristics

Symbol

Parameter

Min

Typ

Max

Units

VCC

 

 

 

Conditions

VIH

Input HIGH Voltage

 

2.0

 

 

V

 

 

Recognized HIGH Signal

VIL

Input LOW Voltage

 

 

 

0.8

V

 

 

Recognized LOW Signal

VCD

Input Clamp Diode Voltage

 

 

− 1.2

V

Min

IIN =

− 18 mA

 

VOH

Output HIGH Voltage

 

2.5

 

 

V

Min

IOH =

3 mA

 

 

 

 

2.0

 

 

V

Min

IOH =

32 mA

 

VOL

Output LOW Voltage

 

 

 

0.55

V

Min

IOL =

64 mA

 

IIH

Input HIGH Current

 

 

 

1

µ A

Max

VIN =

2.7V (Note 3)

 

 

 

 

 

 

1

VIN =

VCC

 

 

 

 

 

 

 

 

 

 

IBVI

Input HIGH Current Breakdown Test

 

 

7

µ A

Max

VIN =

7.0V

 

IIL

Input LOW Current

 

 

 

− 1

µ A

Max

VIN =

0.5V (Note 3)

 

 

 

 

 

 

− 1

VIN =

0.0V

 

 

 

 

 

 

 

 

 

 

VID

Input Leakage Test

 

4.75

 

 

V

 

0.0

IID =

1.9 µ A

 

 

 

 

 

 

 

 

 

 

All Other Pins Grounded

 

 

 

 

 

 

 

 

 

 

 

 

 

IOZH

Output Leakage Current

 

 

10

µ A

0 −

5.5V

VOUT =

2.7V;

 

n =

2.0V

 

 

OE

IOZL

Output Leakage Current

 

 

− 10

µ A

0 −

5.5V

VOUT =

0.5V;

 

n =

2.0V

 

 

OE

IOS

Output Short-Circuit Current

− 100

 

− 275

mA

Max

VOUT =

0.0V

 

ICEX

Output HIGH Leakage Current

 

 

50

µ A

Max

VOUT =

VCC

 

IZZ

Bus Drainage Test

 

 

 

100

µ A

 

0.0

VOUT =

5.5V; All Others GND

ICCH

Power Supply Current

 

 

 

50

µ A

Max

All Outputs HIGH

 

ICCL

Power Supply Current

 

 

 

30

mA

Max

All Outputs LOW

 

ICCZ

Power Supply Current

 

 

 

50

µ A

Max

 

n =

VCC;

 

 

 

 

OE

 

 

 

 

 

 

 

 

 

 

All Others at VCC or Ground

ICCT

Additional ICC/Input

Outputs Enabled

 

 

1.5

mA

 

 

VI =

VCC − 2.1V

 

 

 

Outputs 3-STATE

 

 

1.5

mA

Max

Enable Input VI = VCC − 2.1V

 

 

Outputs 3-STATE

 

 

50

µ A

Data Input VI = VCC − 2.1V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

All Others at VCC or Ground

ICCD

Dynamic ICC

No Load

 

 

 

mA/

 

 

Outputs Open

 

 

(Note 3)

 

 

 

0.1

MHz

Max

 

 

 

 

 

 

OE

n =

GND, (Note 4)

One Bit Toggling, 50% Duty Cycle

Note 3: Guaranteed, but not tested.

Note 4: For 8 bits toggling, ICCD < 0.8 mA/MHz.

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2

AC Electrical Characteristics

 

 

 

 

 

TA = +

25° C

TA = − 55° C to + 125° C

TA = −

40° C to +

85° C

 

 

 

 

 

 

VCC =

+

5V

VCC = 4.5V–5.5V

VCC = 4.5V–5.5V

 

Symbol

 

Parameter

 

 

CL = 50 pF

CL =

50 pF

CL = 50 pF

 

Units

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Min

Typ

Max

Min

Max

Min

Max

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPLH

Propagation Delay

 

1.0

 

 

 

4.8

 

0.8

5.5

1.0

4.8

ns

tPHL

Data to Outputs

 

1.6

 

 

 

4.8

 

1.0

5.5

1.6

4.8

 

 

 

 

 

 

tPZH

Output Enable

 

1.1

 

 

 

6.2

 

0.8

7.5

1.1

6.2

ns

tPZL

Time

 

 

1.1

 

 

 

6.2

 

0.8

7.7

1.1

6.2

 

 

 

 

 

 

 

tPHZ

Output Disable

 

1.8

 

 

 

6.4

 

1.0

7.5

1.8

6.4

ns

tPLZ

Time

 

 

1.6

 

 

 

5.8

 

1.0

7.2

1.6

5.8

 

 

 

 

 

 

 

Capacitance

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

 

 

 

Typ

 

Units

 

 

 

Conditions

 

 

 

 

 

 

 

TA = 25° C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CIN

 

Input Capacitance

 

 

 

 

 

5.0

 

pF

 

VCC =

0V

 

 

 

COUT (Note 5)

Output Capacitance

 

 

 

 

 

9.0

 

pF

 

VCC =

5.0V

 

 

 

Note 5: COUT is measured at frequency f =

1 MHz, per MIL-STD-883, Method 3012.

 

 

 

 

 

 

 

74ABT240

3

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