October 1989
Revised August 2000
100354
Low Power 8-Bit Register with Cut-Off Drivers
General Description
The 100354 contains eight D-type edge triggered, master/ slave flip-flops with individual inputs (Dn), true outputs (Qn),
a clock input (CP), an output enable pin (OEN), and a common clock enable pin (CEN). Data enters the master when CP is LOW and transfers to the slave when CP goes HIGH. When the CEN input goes HIGH it overrides all other inputs, disables the clock, and the Q outputs maintain the last state.
A Q output follows its D input when the OEN pin is LOW. A HIGH on OEN holds the outputs in a cut-off state. The cutoff state is designed to be more negative than a normal ECL LOW level. This allows the output emitter-followers to turn off when the termination supply is − 2.0V, presenting a high impedance to the data bus. This high impedance
reduces termination power and prevents loss of low state noise margin when several loads share the bus.
The 100354 outputs are designed to drive a doubly terminated 50Ω transmission line (25Ω load impedance). All inputs have 50 kΩ pull-down resistors.
Features
■Cut-off drivers
■Drives 25Ω load
■Low power operation
■2000V ESD protection
■Voltage compensated operating range = − 4.2V to − 5.7V
■Available to industrial grade temperature range
Ordering Code:
Order Number |
Package Number |
Package Description |
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100354PC |
N24E |
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide |
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100354QC |
V28A |
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square |
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100354QI |
V28A |
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square |
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Industrial Temperature Range (− 40° C to + 85° C) |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol |
Connection Diagrams |
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24-Pin DIP |
Pin Descriptions
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Pin Names |
Description |
28-Pin PLCC |
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D0–D7 |
Data Inputs |
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CEN |
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Clock Enable Input |
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CP |
Clock Input (Active Rising Edge) |
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Output Enable Input |
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OEN |
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Q0–Q7 |
Data Outputs |
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Drivers Off-Cut with Register Bit-8 Power Low 100354
© 2000 Fairchild Semiconductor Corporation |
DS010610 |
www.fairchildsemi.com |
100354
Truth Table
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Inputs |
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Outputs |
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Dn |
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Qn |
CEN |
CP |
OEN |
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L |
L |
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L |
L |
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H |
L |
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L |
H |
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X |
X |
L |
L |
NC |
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X |
X |
H |
L |
NC |
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X |
H |
X |
L |
NC |
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X |
X |
X |
H |
Cutoff |
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H = HIGH Voltage Level
L = LOW Voltage Level
NC = No Change
X = Don’t Care
Cutoff = Lower-than-LOW State
= LOW-to-HIGH Transition
Logic Diagram
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 1)
Storage Temperature (TSTG) |
− 65° C to + 150° C |
Maximum Junction Temperature (TJ) |
+ 150° C |
VEE Pin Potential to Ground Pin |
− 7.0V to + 0.5V |
Input Voltage (DC) |
VEE to + 0.5V |
Output Current (DC Output HIGH) |
− 100 mA |
ESD (Note 2) |
≥ 2000V |
Recommended Operating
Conditions
Case Temperature (TC) |
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Commercial |
0° C to + 85° C |
Industrial |
− 40° C to + 85° C |
Supply Voltage (VEE) |
− 5.7V to − 4.2V |
Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version
DC Electrical Characteristics (Note 3)
VEE = − 4.2V to − 5.7V, VCC = VCCA = |
GND, TC = 0° C to + 85° C |
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Symbol |
Parameter |
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Min |
Typ |
Max |
Units |
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Conditions |
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VOH |
Output HIGH Voltage |
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− 1025 |
− 955 |
− 870 |
mV |
VIN = |
VIH (Max) |
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Loading with |
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VOL |
Output LOW Voltage |
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− 1830 |
− 1705 |
− 1620 |
or VIL (Min) |
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25Ω to − 2.0V |
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VOHC |
Output HIGH Voltage |
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− 1035 |
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mV |
VIN = |
VIH (Min) |
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Loading with |
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VOLC |
Output LOW Voltage |
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− 1610 |
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or VIL (Max) |
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25Ω to − 2.0V |
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− 1950 |
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VIN = |
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= HIGH |
VOLZ |
Cutoff LOW Voltage |
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mV |
VIH (Min) |
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OEN |
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or VIL (Max) |
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VIH |
Input HIGH Voltage |
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− 1165 |
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− 870 |
mV |
Guaranteed HIGH Signal for All Inputs |
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VIL |
Input LOW Voltage |
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− 1830 |
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− 1475 |
mV |
Guaranteed LOW Signal for All Inputs |
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IIL |
Input LOW Current |
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0.50 |
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µ A |
VIN = |
VIL (Min) |
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IIH |
Input HIGH Current |
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240 |
µ A |
VIN = |
VIH (Max) |
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IEE |
Power Supply Current |
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Inputs Open |
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− 202 |
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− 105 |
mA |
VEE = |
− 4.2V to − 4.8V |
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− 209 |
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− 105 |
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VEE = |
− 4.2V to − 5.7V |
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Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions.
100354
3 |
www.fairchildsemi.com |
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