Fairchild Semiconductor 74ABT16244CSSCX, 74ABT16244CSSC, 74ABT16244CMTDX, 74ABT16244CMTD Datasheet

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Fairchild Semiconductor 74ABT16244CSSCX, 74ABT16244CSSC, 74ABT16244CMTDX, 74ABT16244CMTD Datasheet

April 1992

Revised November 1999

74ABT16244

16-Bit Buffer/Line Driver with 3-STATE Outputs

General Description

The ABT16244 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Individual 3- STATE control inputs can be shorted together for 8-bit or 16-bit operation.

Features

Separate control logic for each nibble

16-bit version of the ABT244

Outputs sink capability of 64 mA, source capability of 32 mA

Guaranteed output skew

Guaranteed multiple output switching specifications

Output switching specified for both 50 pF and 250 pF loads

Guaranteed simultaneous switching noise level and dynamic threshold performance

Guaranteed latchup protection

High impedance glitch free bus loading during entire power up and power down cycle

Non-destructive hot insertion capability

Ordering Code:

Order Number

Package Number

Package Description

 

 

 

74ABT16244CSSC

MS48A

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide

 

 

 

74ABT16244CMTD

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

 

 

 

Devices are also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

Pin Descriptions

 

Pin Names

Description

 

 

 

 

n

Output Enable Inputs (Active LOW)

 

OE

I0–I15

Inputs

O0–O15

Outputs

 

 

 

 

Outputs STATE-3 with Driver Buffer/Line Bit-16 74ABT16244

© 1999 Fairchild Semiconductor Corporation

DS010985

www.fairchildsemi.com

74ABT16244

Truth Tables

 

 

 

 

Inputs

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

OE1

I0–I3

O0–O3

 

L

L

L

 

L

H

H

 

H

X

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Inputs

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

OE2

I4–I7

O4–O7

 

L

L

L

 

L

H

H

 

H

X

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Inputs

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

OE3

I8–I11

O8–O11

 

L

L

L

 

L

H

H

 

H

X

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Inputs

Outputs

 

 

 

 

 

 

 

 

 

 

 

OE4

I12–I15

O12–O15

 

L

L

L

 

L

H

H

 

H

X

Z

 

 

 

 

 

 

H =

HIGH Voltage Level

L =

LOW Voltage Level

X =

Immaterial

Z =

High Impedance

Functional Description

The ABT16244 contains sixteen non-inverting buffers with 3-STATE outputs. The device is nibble (4 bits) controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation.

Logic Diagram

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2

Absolute Maximum Ratings(Note 1)

Storage Temperature

− 65° C to + 150° C

Ambient Temperature under Bias

− 55° C to + 125° C

Junction Temperature under Bias

− 55° C to + 150° C

VCC Pin Potential to Ground Pin

− 0.5V to + 7.0V

Input Voltage (Note 2)

− 0.5V to + 7.0V

Input Current (Note 2)

− 30 mA to + 5.0 mA

Voltage Applied to Any Output

 

in the Disabled or

 

Power-Off State

− 0.5V to 5.5V

in the HIGH State

− 0.5V to VCC

Current Applied to Output

 

in LOW State (Max)

twice the rated IOL (mA)

DC Latchup Source Current

− 500 mA

Over Voltage Latchup (I/O)

10V

Recommended Operating

Conditions

Free Air Ambient Temperature

− 40° C to + 85° C

Supply Voltage

+ 4.5V to + 5.5V

Minimum Input Edge Rate (∆ V/∆ t)

 

Data Input

50 mV/ns

Enable Input

20 mV/ns

Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.

Note 2: Either voltage limit or current limit is sufficient to protect inputs.

DC Electrical Characteristics

Symbol

Parameter

Min

Typ

Max

Units

VCC

 

 

 

 

Conditions

VIH

Input HIGH Voltage

 

2.0

 

 

V

 

 

Recognized HIGH Signal

VIL

Input LOW Voltage

 

 

 

0.8

V

 

 

Recognized LOW Signal

VCD

Input Clamp Diode Voltage

 

 

− 1.2

V

Min

 

IIN =

− 18 mA

 

VOH

Output HIGH Voltage

 

2.5

 

 

V

Min

IOH =

3 mA

 

 

 

 

2.0

 

 

V

Min

 

IOH =

32 mA

 

VOL

Output LOW Voltage

 

 

 

0.55

V

Min

 

IOL =

64 mA

 

IIH

Input HIGH Current

 

 

 

1

µ A

Max

 

VIN =

2.7V (Note 3)

 

 

 

 

 

 

1

 

VIN =

VCC

 

 

 

 

 

 

 

 

 

 

 

IBVI

Input HIGH Current

 

 

 

7

µ A

Max

 

VIN =

7.0V

 

 

Breakdown Test

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IIL

Input LOW Current

 

 

 

− 1

µ A

Max

 

VIN =

0.5V (Note 3)

 

 

 

 

 

 

− 1

 

VIN =

0.0V

 

 

 

 

 

 

 

 

 

 

 

VID

Input Leakage Test

 

4.75

 

 

V

 

0.0

IID =

1.9 µ A

 

 

 

 

 

 

 

 

 

 

 

All Other Pins Grounded

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOZH

Output Leakage Current

 

 

10

µ A

0 −

5.5V

 

VOUT =

2.7V;

 

 

n =

2.0V

 

 

OE

IOZL

Output Leakage Current

 

 

− 10

µ A

0 −

5.5V

 

VOUT =

0.5V;

 

 

n =

2.0V

 

 

OE

IOS

Output Short-Circuit Current

− 100

 

− 275

mA

Max

 

VOUT =

0.0V

 

ICEX

Output HIGH Leakage Current

 

 

50

µ A

Max

 

VOUT =

VCC

 

IZZ

Bus Drainage Test

 

 

 

100

µ A

 

0.0

 

VOUT =

5.5V

 

 

 

 

 

 

 

 

 

 

 

All Other Pins GND

 

 

 

 

 

 

 

 

 

 

 

ICCH

Power Supply Current

 

 

 

2.0

mA

Max

All Outputs HIGH

 

ICCL

Power Supply Current

 

 

 

60

mA

Max

All Outputs LOW

 

ICCZ

Power Supply Current

 

 

 

2.0

mA

Max

 

 

n =

VCC

 

 

 

 

 

OE

 

 

 

 

 

 

 

 

 

 

 

All Others at VCC or GND

ICCT

Additional ICC/Input

Outputs Enabled

 

 

2.5

mA

 

 

 

VI =

VCC − 2.1V

 

 

 

Outputs 3-STATE

 

 

2.5

mA

Max

Enable Input VI = VCC − 2.1V

 

 

Outputs 3-STATE

 

 

50

µ A

 

 

 

Data Input VI = VCC − 2.1V

 

 

 

 

 

 

 

 

 

 

All Others at VCC or GND

ICCD

Dynamic ICC

No Load

 

 

 

mA/

 

 

 

Outputs Open,

 

 

n = GND

 

 

 

Max

 

OE

 

(Note 3)

 

 

 

0.1

MHz

 

One Bit Toggling,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50% Duty Cycle

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note 3: Guaranteed but not tested.

74ABT16244

3

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