July 1996
Revised November 1999
74ABT16541
16-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The ABT16541 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is byte controlled. Individual 3- STATE control inputs can be shorted together for 8-bit or 16-bit operation.
Features
■Separate control logic for each nibble
■16-bit version of the ABT541
■Outputs sink capability of 64 mA, source capability of 32 mA
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed latchup protection
■High impedance glitch free bus loading during entire power up and power down cycle
■Non-destructive hot insertion capability
Ordering Code:
Order Number |
Package Number |
Package Description |
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74ABT16541CSSC |
MS48A |
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide |
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74ABT16541CMTD |
MTD48 |
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide |
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Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol |
Connection Diagram |
Pin Descriptions
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Pin Names |
Description |
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n |
Output Enable Inputs (Active Low) |
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OE |
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I0–I15 |
Inputs |
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O0–O15 |
Outputs |
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Outputs STATE-3 with Driver Buffer/Line Bit-16 74ABT16541
© 1999 Fairchild Semiconductor Corporation |
DS012149 |
www.fairchildsemi.com |
74ABT16541
Truth Tables
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Inputs |
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Outputs |
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OE 1 |
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OE 2 |
I0–I7 |
O0–O7 |
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L |
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L |
L |
L |
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L |
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L |
H |
H |
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H |
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X |
X |
Z |
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X |
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H |
X |
Z |
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Inputs |
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Outputs |
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OE 4 |
OE 3 |
I8–I15 |
O8–O15 |
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L |
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L |
L |
L |
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L |
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L |
H |
H |
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H |
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X |
X |
Z |
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X |
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H |
X |
Z |
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H = |
HIGH Voltage Level |
L = |
LOW Voltage Level |
X = |
Immaterial |
Z = |
High Impedance |
Functional Description
The ABT16541 contains sixteen non-inverting buffers with 3-STATE outputs. The device is byte (8 bits) controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation.
Logic Diagrams
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 1)
Storage Temperature |
− 65° C to + 150° C |
Ambient Temperature under Bias |
− 55° C to + 125° C |
Junction Temperature under Bias |
− 55° C to + 150° C |
VCC Pin Potential to Ground Pin |
− 0.5V to + 7.0V |
Input Voltage (Note 2) |
− 0.5V to + 7.0V |
Input Current (Note 2) |
− 30 mA to + 5.0 mA |
Voltage Applied to Any Output |
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in the Disabled or |
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Power-Off State |
− 0.5V to 5.5V |
in the HIGH State |
− 0.5V to VCC |
Current Applied to Output |
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in LOW State (Max) |
twice the rated IOL (mA) |
DC Latchup Source Current |
− 500 mA |
Over Voltage Latchup (I/O) |
10V |
Recommended Operating
Conditions
Free Air Ambient Temperature |
− 40° C to + 85° C |
Supply Voltage |
+ 4.5V to + 5.5V |
Minimum Input Edge Rate (∆ V/∆ t) |
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Data Input |
50 mV/ns |
Enable Input |
20 mV/ns |
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol |
Parameter |
Min |
Typ |
Max |
Units |
VCC |
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Conditions |
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VIH |
Input HIGH Voltage |
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2.0 |
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V |
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Recognized HIGH Signal |
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VIL |
Input LOW Voltage |
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0.8 |
V |
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Recognized LOW Signal |
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VCD |
Input Clamp Diode Voltage |
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− 1.2 |
V |
Min |
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IIN = |
− 18 mA |
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VOH |
Output HIGH |
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2.5 |
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V |
Min |
IOH = |
− |
3 mA |
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Voltage |
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2.0 |
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V |
Min |
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IOH = |
− |
32 mA |
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VOL |
Output LOW Voltage |
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0.55 |
V |
Min |
IOL = |
64 mA |
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IIH |
Input HIGH Current |
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1 |
µ A |
Max |
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VIN = |
2.7V (Note 3) |
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1 |
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VIN = |
VCC |
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IBVI |
Input HIGH Current |
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7 |
µ A |
Max |
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VIN = |
7.0V |
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Breakdown Test |
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IIL |
Input LOW Current |
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− 1 |
µ A |
Max |
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VIN = |
0.5V (Note 3) |
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− 1 |
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VIN = |
0.0V |
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VID |
Input Leakage Test |
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4.75 |
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V |
0.0 |
IID = |
1.9 µ A |
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All Other Pins Grounded |
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IOZH |
Output Leakage Current |
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10 |
µ A |
0–5.5V |
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VOUT = |
2.7V; |
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n = |
2.0V |
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OE |
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IOZL |
Output Leakage Current |
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− 10 |
µ A |
0–5.5V |
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VOUT = |
0.5V; |
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n = |
2.0V |
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OE |
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IOS |
Output Short-Circuit Current |
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− 100 |
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− 275 |
mA |
Max |
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VOUT = |
0.0V |
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ICEX |
Output HIGH Leakage Current |
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50 |
µ A |
Max |
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VOUT = |
VCC |
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IZZ |
Bus Drainage Test |
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100 |
µ A |
0.0 |
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VOUT = |
5.5V |
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All Other Pins GND |
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ICCH |
Power Supply Current |
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100 |
µ A |
Max |
All Outputs HIGH |
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ICCL |
Power Supply Current |
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60 |
mA |
Max |
All Outputs LOW |
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ICCZ |
Power Supply Current |
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100 |
µ A |
Max |
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n = |
VCC |
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OE |
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All Others at VCC or GND |
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ICCT |
Additional ICC/Input |
Outputs Enabled |
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2.5 |
mA |
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VI = |
VCC − 2.1V |
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Outputs 3-STATE |
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2.5 |
mA |
Max |
Enable Input VI = VCC − 2.1V |
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Outputs 3-STATE |
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50 |
µ A |
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Data Input VI = VCC − 2.1V |
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All Others at VCC or GND |
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ICCD |
Dynamic ICC |
No Load |
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mA/ |
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Outputs Open, |
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n = GND |
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OE |
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(Note 3) |
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0.1 |
MHz |
Max |
One Bit Toggling, |
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50% Duty Cycle |
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VOLP |
Quiet Output Maximum Dynamic VOL |
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0.4 |
0.7 |
V |
5.0 |
TA = |
25° C (Note 4) |
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VOLV |
Quiet Output Minimum Dynamic VOL |
− 1.3 |
− 1.0 |
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V |
5.0 |
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TA = |
25° C (Note 4) |
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VOHV |
Minimum HIGH Level Dynamic Output Voltage |
2.7 |
3.0 |
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V |
5.0 |
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TA = |
25° C (Note 6) |
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VIHD |
Minimum HIGH Level Dynamic Input Voltage |
2.0 |
1.4 |
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V |
5.0 |
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TA = |
25° C (Note 5) |
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74ABT16541
3 |
www.fairchildsemi.com |
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