Texas Instruments UC1838AL883B, UC1838AL, UC1838AJ883B, UC1838AJ Datasheet

UC1838A

UC2838A

UC3838A

Magnetic Amplifier Controller

FEATURES

∙Independent 1% Reference

∙Two Uncommitted, Identical Operational Amplifiers

∙100mA Reset Current Source with –120V Capability

∙5V to 40V Analog Operation

∙5W DIL Package

DESCRIPTION

The UC1838A family of magnetic amplifier controllers contains the circuitry to generate and amplify a low-level analog error signal along with a high volt- age-compliant current source. This source will provide the reset current necessary to enable a magnetic amplifier to regulate and control a power supply output in the range of 2A to 20A.

By controlling the reset current to a magnetic amplifier, this device will define the amount of volt-seconds the magnetic amplifier will block before switching to the conducting state. Magnetic amplifiers are ideal for post-regulators for multi- ple-output power supplies where each output can be independently controlled with efficiencies up to 99%. With a square or pulse-width-modulated input voltage, a magnetic amplifier will block a portion of this input waveform, allowing just enough to pass to provide a regulated output. With the UC1838A, only the magnetic amplifier coil, three diodes, and an output L-C filter are necessary to implement a complete closed-loop regulator.

The UC1838A contains a precision 2.5V reference, two uncommitted high-gain op amps and a high-gain PNP-equivalent current source which can deliver up to 100mA of magnetic amplifier reset current and with –120 volt capability.

These devices are available in a plastic “bat-wing” DIP for operation over a –20°C to +85°C temperature range and, with reduced power, in a hermetically sealed cerdip for –55°C to +125°C operation. Surface mount versions are also available.

This improved “A” version replaced the non “A” version formerly introduced.

BLOCK DIAGRAM

VCC	10
VREF	9	2.5V
		REFERENCE
				11	VM
INV. IN	6	5k	1k	20
		3.5V
		E/A
N.I. IN	7
E/A OUT	8
INV. IN	3			14	RESET
		C/L		15	DR 1
N.I. IN	2
				16	DR 2
C/L OUT	1

4 5 12 13 GND GND GND GND

UDG-97174

04/99

ABSOLUTE MAXIMUM RATINGS

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Magnetic Amp. Source Voltage, VM . . . . . . . . . . . . . . . . . . . . . . . . 40V

Reset Output Voltage, VR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –120V Total Current Source Voltage, VM - VR . . . . . . . . . . . . . . . . . . –140V

Amplifier Input Range . . . . . . . . . . . . . . . . . . . . . . –0.3V to VCC

Reset Input Current, IDR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10mA Power Dissipation at TA = 25°C

Q, N, DP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2W J, L Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W

Power Dissipation at T (leads/case) = 25°C

Q, N, DP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5W J, L Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2W Operating Temperature Range. . . . . . . . . . . . –55°C to +125°C Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . . 300°C

Note: All voltages are with respect to ground pins. All currents are positive into the specified terminal. Consult Packaging section of Databook for thermal limitations and considerations of package.

ORDERING INFORMATION

	TEMPERATURE RANGE	PACKAGE
UC1838AJ	–55°C to +125°C	Ceramic Dip
UC1838AL		CLCC
UC2838ADP	–20°C to +85°C	Power SOIC
UC2838AN		Plastic Dip
UC2838AQ		PLCC
UC3838ADP	0°C to +70°C	Power SOIC
UC3838AN		Plastic Dip
UC3838AQ		PLCC

UC1838A

UC2838A

UC3838A

CONNECTION DIAGRAMS

DIL-16, SOIC-16 (TOP VIEW)

J or N Package, DP Package

C/L Out	1				16	DR 2
C/L N.I. In	2				15	DR 1
C/L INV. In	3				14	Reset
Gnd	4				13	Gnd
Gnd	5				12	Gnd
E/A Inv. In	6				11	VM
E/A N.I. In	7				10	VCC
E/A Out	8				9	VREF

Note: All four ground pins must be connected to a common ground

PLCC-20, LCC-20 (TOP VIEW)

Q, L Packages

N/C
C/L Out																																					DR2
C/L N.I. In																																					DR1
						3						2			1						20								19
C/L Inv. In		4																											18								Reset
GND		5																											17								N/C
N/C		6																											16								N/C
N/C		7																											15								GND
E/A Inv. In		8																											14								VM
E/A N.I. In		9									10				11						12								13								VCC
E/A Out																																					VREF
																																					N/C

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