Texas Instruments TPS77633PWP, TPS77633PWPR, TPS77633DR, TPS77633D, TPS77628PWPR Datasheet

TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS

SLVS232B ± SEPTEMBER 1999 ± REVISED NOVEMBER 1999

DOpen Drain Power-On Reset With 200-ms Delay (TPS775xx)

DOpen Drain Power Good (TPS776xx)

D500-mA Low-Dropout Voltage Regulator

DAvailable in 1.5-V, 1.8-V, 2.5-V, 2.8-V (TPS77628 Only), 3.3-V Fixed Output and Adjustable Versions

DDropout Voltage to 169 mV (Typ) at 500 mA (TPS77x33)

DUltra Low 85 A Typical Quiescent Current

DFast Transient Response

D2% Tolerance Over Specified Conditions for Fixed-Output Versions

PWP PACKAGE

(TOP VIEW)

GND/HSINK				1	20	GND/HSINK
GND/HSINK				2	19	GND/HSINK
GND				3	18	NC
NC				4	17	NC
				5	16
	EN						RESET/PG
	IN			6	15	FB/NC
	IN			7	14	OUT
NC				8	13	OUT
GND/HSINK				9	12	GND/HSINK
GND/HSINK				10	11	GND/HSINK

NC ± No internal connection

D8-Pin SOIC and 20-Pin TSSOP PowerPAD

(PWP) Package

DThermal Shutdown Protection

description

The TPS775xx and TPS776xx devices are designed to have a fast transient response and be stable with a 10- F low ESR capacitors. This combination provides high performance at a reasonable cost.

TPS77x33

DROPOUT VOLTAGE vs

FREE-AIR TEMPERATURE

D PACKAGE (TOP VIEW)

GND			1	8		RESET/PG
						FB/NC
	EN		2	7
	IN		3	6		OUT
	IN		4	5		OUT

TPS77x33

LOAD TRANSIENT RESPONSE

	103											mV		CO = 2x47 µF
											in
														ESR = 1/2x100 mΩ
mV											Change±	Voltage±	50
	102													VO = 3.3 V
														V = 4.3 V
						IO = 500 mA							0		I
Voltage±												Output
											V
											O		±50
	101
Dropout
	100					IO = 10 mA					±mA		500
DO											Current
±
V	10±1										Output		0
		CO = 10 µF					IO = 0				±
	10±2											O
											I
	±60	±40	±20	0	20	40	60	80	100	120	140		0	20	40	60	80	100	120	140	160	180	200
			TA ± Free-Air Temperature ± °C
																	t ± Time ± µs

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1999, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

1

TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS

SLVS232B ± SEPTEMBER 1999 ± REVISED NOVEMBER 1999

description (continued)

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 169 mV at an output current of 500 mA for the TPS77x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 A over the full range of output current, 0 mA to 500 mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to 1 A at TJ = 25°C.

The RESET output of the TPS775xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS775xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.

Power good (PG) of the TPS776xx is an active high output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS775xx and TPS776xx are offered in 1.5-V, 1.8-V, 2.5-V, 2.8 V (TPS77628 only), and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V for TPS77501 option and 1.2 V to 5.5 V for TPS77601 option). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS775xx and TPS776xx families are available in 8 pin SOIC and 20 pin TSSOP packages.

AVAILABLE OPTIONS²

	OUTPUT
	VOLTAGE		PACKAGED DEVICES
TJ	(V)
	TYP	TSSOP		SOIC
		(PWP)			(D)
	3.3	TPS77533PWP	TPS77633PWP	TPS77533D		TPS77633D
	2.5	TPS77525PWP	TPS77625PWP	TPS77525D		TPS77625D
	2.8	Ð	TPS77628PWP	Ð		TPS77628D
	1.8	TPS77518PWP	TPS77618PWP	TPS77518D		TPS77618D
± 40°C to 125°C
	1.5	TPS77515PWP	TPS77615PWP	TPS77515D		TPS77615D
	Adjustable	Ð	TPS77601PWP	Ð		TPS77601D
	1.2 V to 5.5 V
	Adjustable	TPS77501PWP	Ð	TPS77501D		Ð
	1.5 V to 5.5 V

The TPS77x01 is programmable using an external resistor divider (see application information). The D and PWP packages are available taped and reeled. Add an R suffix to the device type (e.g., TPS77501DR).

²The TPS775xx has an open-drain power-on reset with a 200-ms delay function. The TPS776xx has an open-drain power good function.

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS

SLVS232B ± SEPTEMBER 1999 ± REVISED NOVEMBER 1999

		6	RESET/	16	RESET/PG
	VI	IN
			PG
		7
		IN
			OUT	14	VO
	0.1 F	5		13
			OUT
		EN			CO²
				+
			GND	10	F
		3

² See application information section for capacitor selection details.

Figure 1. Typical Application Configuration for Fixed Output Options

functional block diagramÐadjustable version

IN
EN
	PG or RESET
_
+	OUT

	+	200 ms Delay	R1
	_	(for RESET Option)
	Vref = 1.1834 V		FB/NC

R2

GND

External to the device

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

3

TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS

SLVS232B ± SEPTEMBER 1999 ± REVISED NOVEMBER 1999

functional block diagramÐfixed-voltage version

IN
EN
_
+
+	200 ms Delay	R1
_	(for RESET Option)
Vref = 1.1834 V

PG or RESET

OUT

R2

GND

4	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS

SLVS232B ± SEPTEMBER 1999 ± REVISED NOVEMBER 1999

Terminal Functions

SOIC Package (TPS775xx)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

2

I

Enable input

EN

FB/NC

7

I

Feedback input voltage for adjustable device (no connect for fixed options)

GND

1

Regulator ground

IN

3, 4

I

Input voltage

OUT

5, 6

O

Regulated output voltage

8

O

output

RESET

RESET

TSSOP Package (TPS775xx)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

5

I

Enable input

EN

FB/NC

15

I

Feedback input voltage for adjustable device (no connect for fixed options)

GND

3

Regulator ground

GND/HSINK

1, 2, 9, 10, 11,

Ground/heatsink

12, 19, 20

IN

6, 7

I

Input voltage

NC

4, 8, 17, 18

No connect

OUT

13, 14

O

Regulated output voltage

16

O

output

RESET

RESET

SOIC Package (TPS776xx)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

2

I

Enable input

EN

FB/NC

7

I

Feedback input voltage for adjustable device (no connect for fixed options)

GND

1

Regulator ground

IN

3, 4

I

Input voltage

OUT

5, 6

O

Regulated output voltage

PG

8

O

PG output

TSSOP Package (TPS776xx)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

5

I

Enable input

EN

FB/NC

15

I

Feedback input voltage for adjustable device (no connect for fixed options)

GND

3

Regulator ground

GND/HSINK

1, 2, 9, 10, 11,

Ground/heatsink

12, 19, 20

IN

6, 7

I

Input voltage

NC

4, 8, 17, 18

No connect

OUT

13, 14

O

Regulated output voltage

PG

16

O

PG output

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

5

TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS

SLVS232B ± SEPTEMBER 1999 ± REVISED NOVEMBER 1999

TPS775xx RESET timing diagram

VI
Vres²				Vres
				t
VO	V	³	V	³
		IT +		IT +

Threshold
Voltage	Less than 5% of the
VIT ±³	output voltage	VIT ±³

		t
RESET	200 ms	200 ms
Output
	Delay	Delay
Output		Output
Undefined		Undefined
		t

²Vres is the minimum input voltage for a valid RESET. The symbol Vres is not currently listed within EIA or JEDEC standards for semiconductor symbology.

³VIT ±Trip voltage is typically 5% lower than the output voltage (95%VO) VIT± to VIT+ is the hysteresis voltage.

6	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS

SLVS232B ± SEPTEMBER 1999 ± REVISED NOVEMBER 1999

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Input voltage range³ , VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					. . . . . . . . . . ±0.3 V to 13.5	V
Voltage range at		EN		. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . ±0.3 V to 16.5	V
Maximum	RESET		. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .voltage (TPS775xx)		. . . . . . . . . . . . . . . . . . 16.5 V
Maximum PG voltage (TPS776xx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					. . . . . . . . . . . . . . . . . . 16.5	V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					. . . . . . . . . . Internally limited
Output voltage, VO (OUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					. . . . . . . . . . . . . . . . . . . . . 7	V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					See dissipation rating tables
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . .					. . . . . . . . . . ±40°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					. . . . . . . . . . ±65°C to 150°C
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .					. . . . . . . . . . . . . . . . . . . . 2 kV

² Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

³ All voltage values are with respect to network terminal ground.

DISSIPATION RATING TABLE 1 ± FREE-AIR TEMPERATURES

	PACKAGE	AIR FLOW	TA < 25°C	DERATING FACTOR	TA = 70°C	TA = 85°C
		(CFM)	POWER RATING	ABOVE TA = 25°C	POWER RATING	POWER RATING
	D	0	568 mW	5.68 mW/°C	312 mW	227 mW
		250	904 mW	9.04 mW/°C	497 mW	361 mW
		DISSIPATION RATING TABLE 2 ± FREE-AIR TEMPERATURES
	PACKAGE	AIR FLOW	TA < 25°C	DERATING FACTOR	TA = 70°C	TA = 85°C
		(CFM)	POWER RATING	ABOVE TA = 25°C	POWER RATING	POWER RATING
	PWP#	0	2.9 W	23.5 mW/°C	1.9 W	1.5 W
		300	4.3 W	34.6 mW/°C	2.8 W	2.2 W
	PWP||	0	3 W	23.8 mW/°C	1.9 W	1.5 W
		300	7.2 W	57.9 mW/°C	4.6 W	3.8 W

#This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in ×5-in PCB, 1 oz. copper, 2-in × 2-in coverage (4 in2).

||This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in ×2-in PCB, 1 oz. copper with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2). For more information, refer to TI technical brief SLMA002.

recommended operating conditions

			MIN	MAX	UNIT
	Input voltage, VIk		2.7	10	V
	Output voltage range, VO	TPS77501	1.5	5.5	V
		TPS77601	1.2	5.5
	Output current, IO (Note 1)		0	500	mA
	Operating virtual junction temperature, TJ (Note 1)		± 40	125	°C

k To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load). NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the

device operate under conditions beyond those specified in this table for extended periods of time.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

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