Texas Instruments TPS77930DGK, TPS77925DGKR, TPS77925DGK, TPS77918DGK, TPS77918DGKR Datasheet

TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A ± MARCH 2000 ± REVISED MARCH 2000

DOpen Drain Power-On Reset With 220-ms Delay

D250-mA Low-Dropout Voltage Regulator

DAvailable in 1.8-V, 2.5-V, 3-V, Fixed Output and Adjustable Versions

DDropout Voltage Typically 200 mV at 250 mA (TPS77930)

DUltra Low 92- A Quiescent Current (Typ)

D8-Pin MSOP (DGK) Package

DLow Noise (55 Vrms) With No Bypass

Capacitor (TPS77918)

TPS779xx

DGK PACKAGE

(TOP VIEW)

FB/SENSE					1	8			OUT
									OUT
	RESET				2	7
	EN				3	6			IN
	GND				4	5			IN

TPS77930

DROPOUT VOLTAGE

D 2% Tolerance Over Specified Conditions	vs
For Fixed-Output Versions	JUNCTION TEMPERATURE

DFast Transient Response

DThermal Shutdown Protection

DSee the TPS773xx and TPS774xx Family of Devices for Active Low Enable

description

The TPS779xx is a low dropout regulator with integrated power-on reset. The device is capable of supplying 250 mA of output current with a dropout of 200 mV (TPS77930). Quiescent current is 92 A at full load dropping down to 1 A when the device is disabled. The device is optimized to be stable with a wide range of output capacitors including low ESR ceramic (10 F) or low capacitance (1 F) tantalum capacitors. The device has extremely low noise output performance (55 Vrms) without using any added filter capacitors. TPS779xx is designed to have a fast transient response for larger load current changes.

	400
		VI = 2.9 V
	350
mV	300			IL= 0.25 A
±
Voltage	250
	200
Dropout
				IL= 0.15 A
	150
±
DO	100
V						IL= 0.05 A
	50
	0
	±50	±30	±10	10	30	50	70	90	110	130
			TJ ± Junction Temperature ± °C

The TPS779xx is offered in 1.8-V, 2.5-V, and 3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is 2% over line, load, and temperature ranges. The TPS779xx family is available in 8-pin MSOP (DGK) packages.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 200 mV at an output current of 250 mA for 3.3 volt option) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 92 A over the full range of output current, 0 mA to 250 mA). These two key specifications yield a significant improvement in operating life for battery-powered systems.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

This document contains information on products in more than one phase	Copyright 2000, Texas Instruments Incorporated
of development. The status of each device is indicated on the page(s)
specifying its electrical characteristics.
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265	1

TPS77901, TPS77918, TPS77925, TPS77930

250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A ± MARCH 2000 ± REVISED MARCH 2000

description (continued)

The device is enabled when the EN pin is connected to a high-level input voltage. This LDO family also features a sleep mode; applying a TTL low signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 A at TJ = 25°C.

The TPS779xx features an integrated power-on reset, commonly used as a supply voltage supervisor (SVS), or reset output voltage. The RESET output of the TPS779xx initiates a reset in DSP, microcomputer or microprocessor systems at power-up and in the event of an undervoltage condition. An internal comparator in the TPS779xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When OUT reaches 95% of its regulated voltage, RESET will go to a high-impedance state after a 220 ms delay. RESET will go to low-impedance state when OUT is pulled below 95% (i.e. over load condition) of its regulated voltage.

AVAILABLE OPTIONS

	OUTPUT
	VOLTAGE	PACKAGED DEVICES
TJ	(V)
	TYP	MSOP
		(DGK)

3.0TPS77930DGK

2.5TPS77925DGK

± 40°C to 125°C	1.8	TPS77918DGK
	Adjustable	TPS77901DGK
	1.5 V to 5.5 V

The TPS77901 is programmable using an external resistor divider (see application information). The DGK package is available taped and reeled. Add an R suffix to the device type (e.g., TPS77901DGKR).

VI	5		7	VO
	IN	OUT
	6	OUT	8
	IN
		SENSE	1
0.1 F	3	RESET	2	RESET Output
	EN
			+	F
		GND	10
	4

Figure 1. Typical Application Configuration (For Fixed Output Options)

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A ± MARCH 2000 ± REVISED MARCH 2000

functional block diagramÐadjustable version

IN
EN
	RESET
_
+	OUT

	+	220 ms Delay	R1
	_
	Vref = 1.1834 V		FB/SENSE
			R2

GND External to the device

functional block diagramÐfixed-voltage version

	IN
	EN
			RESET
	_
	+		OUT
	+		SENSE
		220 ms Delay	R1
	_
	Vref = 1.1834 V

R2

					GND
					Terminal Functions (TPS779xx)
		TERMINAL		I/O	DESCRIPTION
	NAME		NO.
	FB/SENSE		1	I	Feedback input voltage for adjustable device (sense input for fixed options)
	RESET		2	O	Reset output
	EN		3	I	Enable input
	GND		4		Regulator ground
	IN		5, 6	I	Input voltage
	OUT		7, 8	O	Regulated output voltage

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

3

TPS77901, TPS77918, TPS77925, TPS77930

250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A ± MARCH 2000 ± REVISED MARCH 2000

TPS779xx RESET timing diagram

VI
Vres²				Vres
				t
VO	V	³	V	³
		IT +		IT +
Threshold
Voltage
		VIT ±³		VIT ±³
				t
RESET		220 ms		220 ms
Output
		Delay		Delay
Output				Output
Undefined				Undefined
				t

²Vres is the minimum input voltage for a valid RESET. The symbol Vres is not currently listed within EIA or JEDEC standards for semiconductor symbology.

³VIT ±Trip voltage is typically 5% lower than the output voltage (95%VO) VIT± to VIT+ is the hysteresis voltage.

4	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A ± MARCH 2000 ± REVISED MARCH 2000

absolute maximum ratings over operating junction temperature range (unless otherwise noted)

Input voltage range³ , VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			. . . . . . . . . . ±0.3 V to 13.5	V
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			. . . . . . . . . . . ±0.3 V to 16.5	V
Maximum	RESET	. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .voltage	. . . . . . . . . . . . . . . . . . . 16.5 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			. . . . . . . . . . . Internally limited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			See Dissipation Rating Table
Output voltage, VO (OUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			. . . . . . . . . . . . . . . . . . . . 5.5	V
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . .			. . . . . . . . . . . ±40°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			. . . . . . . . . . . ±65°C to 150°C
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			. . . . . . . . . . . . . . . . . . . . . 2 kV

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ³ All voltage values are with respect to network terminal ground.

			DISSIPATION RATING TABLE ± FREE-AIR TEMPERATURES
	PACKAGE	AIR FLOW	θJA	θJC	TA < 25°C	DERATING FACTOR	TA = 70°C	TA = 85°C
		(CFM)	(°C/W) (°C/W)		POWER RATING	ABOVE TA = 25°C	POWER RATING	POWER RATING
		0	266.2	3.84	376 mW	3.76 mW/°C	207 mW	150 mW
	DGK	150	255.2	3.92	392 mW	3.92 mW/°C	216 mW	157 mW
		250	242.8	4.21	412 mW	4.12 mW/°C	227 mW	165 mW

recommended operating conditions

	MIN	MAX	UNIT
Input voltage, VI§	2.7	10	V
Output voltage range, VO	1.5	5.5	V
Output current, IO (see Note 1)	0	250	mA
Operating virtual junction temperature, TJ (see Note 1)	± 40	125	°C

§ To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load). NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the

device operate under conditions beyond those specified in this table for extended periods of time.

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

5

TPS77901, TPS77918, TPS77925, TPS77930

250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A ± MARCH 2000 ± REVISED MARCH 2000
electrical characteristics over recommended operating junction temperature range (TJ = ±40°C to
125°C), VI = VO(typ) + 1 V, IO = 1 mA, EN = 5 V, CO = 10 F (unless otherwise noted)
PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
Adjustable	1.5	V ≤ VO ≤ 5.5 V,	TJ = 25°C		VO
voltage	1.5	V ≤ VO ≤ 5.5 V		0.98VO		1.02VO
1.8 V Output	TJ = 25°C,		2.8 V < VIN < 10 V		1.8
	2.8	V < VIN < 10 V		1.764		1.836
Output voltage (see Notes 2 and 4)							V
	TJ = 25°C,		3.5 V < VIN < 10 V		2.5
2.5 V Output
	3.5	V < VIN < 10 V		2.45		2.55
3.0 V Output	TJ = 25°C,		4.0 V < VIN < 10 V		3.0
	4.0	V < VIN < 10 V		2.94		3.06
Quiescent current (GND current) (see Notes 2 and 4)	TJ = 25°C				92		µA
						125

Output voltage line regulation ( V		/V )		VO + 1 V < VI ≤ 10 V,	TJ = 25°C	0.005		%/V
(see Note 3)	O	O
				VO + 1 V < VI ≤ 10 V			0.05	%/V
Load regulation				TJ = 25°C		1		mV
Output noise voltage				BW = 300 Hz to 100 kHz, TJ = 25°C,		55		µVrms
				TPS77930
Output current Limit				VO = 0 V		0.9	1.3	A
Peak output current				2 ms pulse width,	50% duty cycle	400		mA
Thermal shutdown junction temperature						144		°C
Standby current				EN = VI,	TJ = 25°C		1	µA
				EN = VI			3	µA
FB input current			Adjustable	FB = 1.5 V			1	µA
			Voltage
High level enable input voltage						2		V
Low level enable input voltage							0.7	V
Enable input current						±1	1	µA
Power supply ripple rejection (TPS77318, TPS77418)				f = 1 KHz,	TJ = 25°C	55		dB

NOTES: 2.	Minimum input operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. Maximum input voltage = 10 V, minimum output
	current 1 mA.
3.	If VO < 1.8 V then Vimax = 10 V, Vimin = 2.7 V:
		VO Vimax *	2.7 V
	Line Regulation (mV) + % V			1000
		100
	If VO > 2.5 V then Vimax = 10 V, Vimin = Vo + 1 V:
	Line Regulation (mV) + % V	VO Vimax * VO ) 1				1000
		100
4.	IO = 1 mA to 250 mA

6	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265