MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad Exclusive OR Gate
The MC10H113 is a Quad Exclusive OR Gate with an enable common to all four gates. The outputs may be wire±ORed together to perform a 4±bit comparison function (A = B). The enable is active LOW.
•Propagation Delay, 1.3 ns Typical
•Power Dissipation 175 mW Typ/Pkg (No Load)
•Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range)
•Voltage Compensated
•MECL 10K±Compatible
MAXIMUM RATINGS
Characteristic |
Symbol |
Rating |
Unit |
|
|
|
|
Power Supply (VCC = 0) |
VEE |
±8.0 to 0 |
Vdc |
Input Voltage (VCC = 0) |
VI |
0 to VEE |
Vdc |
Output Current Ð Continuous |
Iout |
50 |
mA |
Ð Surge |
|
100 |
|
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|
Operating Temperature Range |
TA |
0 to +75 |
°C |
Storage Temperature Range Ð Plastic |
Tstg |
±55 to +150 |
°C |
Ð Ceramic |
|
±55 to +165 |
°C |
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ELECTRICAL CHARACTERISTICS (VEE = ±5.2 V ±5%) (See Note)
|
|
0° |
25° |
|
75° |
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Characteristic |
Symbol |
Min |
Max |
Min |
Max |
Min |
|
Max |
Unit |
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Power Supply Current |
IE |
Ð |
46 |
Ð |
42 |
Ð |
|
46 |
mA |
Input Current High |
IinH |
|
|
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|
μA |
Pins 5, 7, 11, 13 |
|
Ð |
430 |
Ð |
270 |
Ð |
|
270 |
|
Pins 4, 6, 10, 12 |
|
Ð |
510 |
Ð |
320 |
Ð |
|
320 |
|
Pin 9 |
|
Ð |
1100 |
Ð |
740 |
Ð |
|
740 |
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Input Current Low |
IinL |
0.5 |
Ð |
0.5 |
Ð |
0.3 |
|
Ð |
μA |
High Output Voltage |
VOH |
±1.02 |
±0.84 |
±0.98 |
±0.81 |
±0.92 |
|
±0.735 |
Vdc |
Low Output Voltage |
VOL |
±1.95 |
±1.63 |
±1.95 |
±1.63 |
±1.95 |
|
±1.60 |
Vdc |
High Input Voltage |
VIH |
±1.17 |
±0.84 |
±1.13 |
±0.81 |
±1.07 |
|
±0.735 |
Vdc |
Low Input Voltage |
VIL |
±1.95 |
±1.48 |
±1.95 |
±1.48 |
±1.95 |
|
±1.45 |
Vdc |
AC PARAMETERS |
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Propagation Delay |
tpd |
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|
ns |
Data |
|
0.4 |
1.7 |
0.4 |
1.8 |
0.5 |
|
1.9 |
|
Enable |
|
0.5 |
2.3 |
0.5 |
2.4 |
0.6 |
|
2.5 |
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Rise Time |
tr |
0.5 |
1.8 |
0.6 |
1.9 |
0.6 |
|
2.0 |
ns |
Fall Time |
tf |
0.5 |
1.8 |
0.6 |
1.9 |
0.6 |
|
2.0 |
ns |
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through a 50±ohm resistor to ±2.0 volts.
MC10H113
L SUFFIX
CERAMIC PACKAGE
CASE 620±10
P SUFFIX
PLASTIC PACKAGE
CASE 648±08
FN SUFFIX
PLCC
CASE 775±02
LOGIC DIAGRAM
E 9
4
2
5
6
3
7
10
14
11
12
15
13
TRUTH TABLE
|
IN |
E |
OUTPUT |
L |
L |
L |
L |
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|
L |
H |
L |
H |
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|
H |
L |
L |
H |
H |
H |
L |
L |
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X |
X |
H |
L |
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VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
DIP
PIN ASSIGNMENT
VCC1 |
|
1 |
|
16 |
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VCC2 |
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AOUT |
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2 |
|
15 |
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DOUT |
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BOUT |
|
3 |
|
14 |
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COUT |
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AIN |
|
4 |
|
13 |
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DIN |
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AIN |
|
5 |
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12 |
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DIN |
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BIN |
|
6 |
|
11 |
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CIN |
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BIN |
|
7 |
|
10 |
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CIN |
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VEE |
|
8 |
|
9 |
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ENABLE |
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Pin assignment is for Dual±in±Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6±11 of the Motorola MECL Data
Book (DL122/D).
9/96
Motorola, Inc. 1996 |
2±213 |
REV 6 |
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