THS10064EVM
THS1206, THS12082,
THS10064, THS10082
Evaluation Module
User’s Guide
January 2001 |
AAP Data Conversion |
SLAU042B
Information About Cautions and Warnings
Preface
Read This First
About This Manual
This user’s guide serves as a reference book for the THS1206/THS12082/ THS10064/THS10082 evaluation module. It describes the operation and usage of the 12-bit THS1206/THS12082 and 10-bit THS10064/THS10082 analog-to-digital converter (ADC) evaluation modules.
How to Use This Manual
This document contains the following chapters:
-Chapter 1 EVM Description
-Chapter 2 Common-Connector Interface
-Chapter 3 Physical Description
- Chapter 4 Schematics
Information About Cautions and Warnings
This book contains cautions.
This is an example of a caution statement.
A caution statement describes a situation that could potentially damage your software or equipment.
The information in a caution is provided for your protection. Please read each caution carefully.
Read This First |
iii |
Related Documentation From Texas Instruments
Related Documentation From Texas Instruments
Data Sheets:
THS1206 data sheet (literature number SLAS217B) contains electrical specifications, available temperature options, general overview of the device, and application information.
THS12082 data sheet (literature number SLAS216) contains electrical specifications, available temperature options, general overview of the device, and application information.
THS10064 data sheet (literature number SLAS255) contains electrical specifications, available temperature options, general overview of the device, and application information.
THS10082 data sheet (literature number SLAS254) contains electrical specifications, available temperature options, general overview of the device, and application information.
iv
Running Title—Attribute Reference
Contents
1 EVM Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
1-1 |
1.1 Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2 Power Supply Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.3 EVM Basic Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.4 EVM Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
2 |
Common-Connector Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
2-1 |
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2.1 |
Daughtercard Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
2-2 |
3 |
Physical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3-1 |
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3.1 |
Printed-Circuit Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3-2 |
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3.2 |
Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3-5 |
4 |
Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4-1 |
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Chapter Title—Attribute Reference |
v |
Running Title—Attribute Reference
Figures
3–1 Silkscreen (Top) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3–2 Silkscreen (Bottom) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3–3 Printed-Circuit Board Layer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 3–4 Printed-Circuit Board Layer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 3–5 Printed-Circuit Board Layer 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 3–6 Printed-Circuit Board Layer 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
Tables
2–1 |
Jumper J6, Expansion Peripheral Interface Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
2-3 |
2–2 |
Jumper J7, Expansion Peripheral Interface Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
2-4 |
3–1 |
Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3-5 |
vi
Chapter 1
EVM Description
This chapter gives a general description and overview of the THS1206/ THS12082/THS10064/THS10082 evaluation module (EVM), and describes the requirements for using this module.
Topic |
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Page |
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1.1 |
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . 1-2 |
1.2 |
Power Supply Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 1-2 |
1.3 |
EVM Basic Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 1-2 |
1.4 |
EVM Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 1-3 |
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1-1
Purpose
1.1 Purpose
The evaluation module provides a platform for lab prototype evaluation of the Texas Instruments 12-bit THS1206/THS12082 and the 10-bit THS10064/ THS10082 high-speed analog-to-digital converters. In addition, it provides the interface to Texas Instruments digital signal processor kits or evaluation modules, which provide the common-connector interface (C6201, C6701, C6211, C5402).
1.2Power Supply Requirements
-The EVM is designed to be powered by a lab dc power supply (red and
black inputs VDD and AGND). The required supply voltage range is from 6 V to 10 V. It can also be powered by a DSP starter kit or evaluation
module, which features the common-connector interface. The selection is done with jumpers J1 and J2.
Voltage Limits
Exceeding the 10-V maximum supply voltage range can damage
EVM components.
1.3 EVM Basic Function
The EVM allows evaluation of the THS1206, THS12082, THS10064, and THS10082 analog-to-digital converters. Typically, a processor is used for evaluating these devices. The EVM is specifically designed for interfacing to the DSP starter kits or evaluation modules, which feature the commonconnector interface (C6201, C6701, C6211, C5402).
The different operation modes for the analog input configuration of the THS1206, THS12082, THS10064, and THS10082 are available on the evaluation module. Any channel selection can be done according to the data sheet of each device.
-Single-ended analog input
The THS1206/THS10064 (THS12082/THS10082) provide up to four (two) single-ended analog input channels. These four (two) single-ended inputs are provided on the EVM via the four BNC connectors, which are labeled AINP, AINM, BINP, and BINM. BNC connectors AINP and AINM do not have any function with the THS12082 and THS10082, which only feature two single-ended analog input channels. The analog input voltage range is from –1 V to 1 V. The analog input is level-shifted into the analog input range of the analog-to-digital converter (1.5 V to 3.5 V) by using an operational amplifier in an inverting configuration. The voltage used for the level shift is generated by the REFOUT (2.5 V) of the analog-to-digital converter. A resistor divider provides the 1.25 V from the 2.5-V output voltage. The analog input signal is dc-coupled.
1-2
EVM Setup
-Differential analog input
The THS1206/THS10064 (THS12082/THS10082) provide up to two (one) differential analog input channels to the analog-to-digital converter. These two (one) differential inputs are provided on the EVM via the two BNC connectors, which are labeled ADIFF and BDIFF. The BNC connector ADIFF does not have any function with the THS12082 and THS10082, which only feature one differential analog input channel. The analog input voltage range is from –2 V to 2 V. To use the differential mode, a single ended signal is applied to ADIFF or BDIFF. This signal is converted into a differential signal by a transformer, and is therefore ac-coupled. The center tap of the transformer is connected to the common mode output voltage REFOUT of the analog-to-digital converter. As a result, the input signal is shifted to the common-mode voltage REFOUT.
-Clock circuit
An external clock with frequency up to 6 MHz (8 MHz for the THS10082 and THS12082) is required for operation of the analog-to-digital converter
in the continuous-conversion mode. The external clock source is required to drive the 50-Ω BNC input EXT-CLK. The clock signal can also be
generated from the connected processor. J7 should be set to the appropriate position.
-Digital output
The digital output of the analog-to-digital converter is applied to connector block J9 and is also connected to the data bus of the common connector interface. No latch is used between the analog-to-digital converter and J9. The analog-to-digital converter is able to drive up to 30 pF at the data bus D0–D11 (D0–D9 for the THS10064 and THS10082).
1.4 EVM Setup
The EVM provides a platform for lab-prototype evaluation. Typically, it is operated by using a Texas Instruments DSP kit or evaluation module.
-J1: selection of the analog supply voltage:
J1 inserted between 1 and 2: the supply voltage (5 V) is taken from the DSP starter kit or evaluation module with the common-connector interface. No external analog supply voltage is required in this configuration.
J1 inserted between 2 and 3: for use of an external dc power supply (6 V to 10 V). The supply voltage, ranging from 6 V to 10 V, is regulated to 5 V by using the Texas Instruments low-dropout regulator TPS7250.
-J2: selection of the digital supply voltage:
J2 inserted between 1 and 2: the supply voltage (3.3 V) is taken from the DSP starter kit or evaluation module with the common-connector interface. No external digital supply voltage is required in this configuration.
J2 inserted between 2 and 3: for use of an external dc power supply (6 V to 10 V). The supply voltage, ranging from 6 V to 10 V, is regulated to 3.3 V by using the Texas Instruments low-dropout regulator TPS7233.
EVM Description |
1-3 |
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EVM Setup
-J3: selection of the analog input configuration:
J3 inserted between 1 and 4: selection of the differential input ADIFF (in combination with J4 set between 1 and 4)
J3 inserted between 2 and 5: selection of the single ended input AINP
J3 inserted between 3 and 6: required for the THS12082 and THS10082, where pin 31 (input AINP of the THS1206) functions as an internal FIFO overflow indicator (OV_FL). This pin can be monitored during data converter software debugging.
-J4: selection of the analog input configuration:
J4 inserted between 1 and 4: selection of the differential input ADIFF (in combination with J3 set between 1 and 4)
J4 inserted between 2 and 5: selection of the single ended input AINM
J4 inserted between 3 and 6: required for the THS12082 and THS10082, where the input AINM of the THS1206 functions as RESET input. Pin 3 of J4 is connected to the RESET signal of the common-connector interface.
-J5: selection of the analog input configuration;
J5 inserted between 1 and 2: selection of the single ended input BINP
J5 inserted between 2 and 3: selection of the differential input BDIFF (in combination with J6 set between 2 and 3)
-J6: selection of the analog input configuration:
J6 inserted between 1 and 2: selection of the single ended input BINM
J6 inserted between 2 and 3: selection of the differential input BDIFF (in combination with J5 set between 2 and 3)
-J7: selection of the clock source:
J7 inserted between 1 and 2: the clock input of the data converter is connected to the common connector interface. In this case, the DSP should generate the clock signal.
J7 inserted between 2 and 3: the clock signal should be applied to the BNC connector EXT_CLK in this configuration.
-J8: J8 is a connector block where the following digital signals can be monitored:
Pin |
Description |
Pin |
Description |
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Pin 1 |
GND |
Pin 6 |
WR/ |
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Pin 2 |
CLK |
Pin 7 |
GND |
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Pin 3 |
GND |
Pin 8 |
OV_FL |
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Pin 4 |
DATA_AV |
Pin 9 |
GND |
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Pin 5 |
GND |
Pin 10 |
RESET |
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1-4
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