Fairchild Semiconductor MM74HC4066N, MM74HC4066MTCX, MM74HC4066M, MM74HC4066SJX, MM74HC4066WM Datasheet

August 1984

Revised January 2000

MM74HC4066

Quad Analog Switch

General Description

The MM74HC4066 devices are digitally controlled analog switches utilizing advanced silicon-gate CMOS technology. These switches have low “ON” resistance and low “OFF” leakages. They are bidirectional switches, thus any analog input may be used as an output and visa-versa. Also the MM74HC4066 switches contain linearization circuitry which lowers the “ON” resistance and increases switch linearity. The MM74HC4066 devices allow control of up to 12V (peak) analog signals with digital control signals of the same range. Each switch has its own control input which disables each switch when LOW. All analog inputs and outputs and digital inputs are protected from electrostatic damage by diodes to VCC and ground.

Features

■Typical switch enable time: 15 ns

■Wide analog input voltage range: 0–12V

■Low “ON” resistance: 30 typ. (MM74HC4066)

■Low quiescent current: 80 μA maximum (74HC)

■Matched switch characteristics

■Individual switch controls

Ordering Code:

Order Number	Package Number	Package Description
MM74HC4066M	M14A	14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74HC4066SJ	M14D	14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC4066MTC	MTC14	14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC4066N	N14A	14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Schematic Diagram

Connection Diagram

Top View

Truth Table

Input	Switch
CTL	I/O–O/I
L	“OFF”
H	“ON”

Switch Analog Quad MM74HC4066

© 2000 Fairchild Semiconductor Corporation

DS005355

www.fairchildsemi.com

MM74HC4066

Absolute Maximum Ratings(Note 1)

(Note 2)
Supply Voltage (VCC)	−0.5 to +15V
DC Control Input Voltage (VIN)	−1.5 to VCC +1.5V
DC Switch I/O Voltage (VIO)	VEE−0.5 to VCC +0.5V
Clamp Diode Current (IIK, IOK)	±20 mA
DC Output Current, per pin (IOUT)	±25 mA
DC VCC or GND Current, per pin (ICC)	±50 mA
Storage Temperature Range (TSTG)	−65°C to +150°C
Power Dissipation (PD)
(Note 3)	600 mW
S.O. Package only	500 mW
Lead Temperature (TL)
(Soldering 10 seconds)	260°C

Recommended Operating

Conditions

	Min	Max	Units
Supply Voltage (VCC)	2	12	V
DC Input or Output Voltage
(VIN, VOUT)	0	VCC	V
Operating Temperature Range (TA)	−40	+85	°C
Input Rise or Fall Times
(tr, tf) VCC = 2.0V		1000	ns
VCC = 4.5V		500	ns
VCC = 9.0V		400	ns

Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.

Note 2: Unless otherwise specified all voltages are referenced to ground.

Note 3: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C.

DC Electrical Characteristics (Note 4)

Symbol	Parameter	Conditions	VCC	TA = 25°C		TA = −40 to 85°C	TA = −55 to 125°C	Units
				Typ		Guaranteed Limits
VIH	Minimum HIGH Level		2.0V		1.5	1.5	1.5	V
	Input Voltage		4.5V		3.15	3.15	3.15	V
			9.0V		6.3	5.3	6.3	V
			12.0V		8.4	8.4	8.4	V
VIL	Maximum LOW Level		2.0V		0.5	0.5	0.5	V
	Input Voltage		4.5V		1.35	1.35	1.35	V
			9.0V		2.7	2.7	2.7	V
			12.0V		3.6	3.6	3.6	V
RON	Maximum “ON” Resistance	V CTL = VIH, IS = 2.0 mA	4.5V	100	170	200	220	Ω
	(Note 5)	VIS = VCC to GND	9.0V	50	85	105	110	Ω
		(Figure 1)	12.0	30	70	85	90	Ω
			2.0V	120	180	215	240	Ω
		VCTL = VIH, IS = 2.0 mA	4.5V	50	80	100	120	Ω
		VIS = VCCor GND	9.0V	35	60	75	80	Ω
		(Figure 1)	12.0V	20	40	60	70	Ω
RON	Maximum “ON” Resistance	V CTL = VIH	4.5V	10	15	20	20	Ω
	Matching	VIS = VCC to GND	9.0V	5	10	15	15	Ω
			12.0V	5	10	15	15	Ω
IIN	Maximum Control	VIN = VCC or GND			±0.1	±1.0	±1.0	μA
	Input Current	VCC = 2−6V
IIZ	Maximum Switch “OFF”	V OS = VCC or GND	6.0V	10	±60	±600	±600	nA
	Leakage Current	VIS = GND or VCC	9.0V	15	±80	±800	±800	nA
		VCTL = VIL (Figure 3)	12.0V	20	±100	±1000	±1000	nA
IIZ	Maximum Switch “ON”	V IS = VCC to GND	6.0V	10	±40	±150	±150	nA
	Leakage Current	VCTL = VIH	9.0V	15	±50	±200	±200	nA
		VOS = OPEN (Figure 2)	12.0V	20	±60	±300	±300	nA
ICC	Maximum Quiescent	VIN = VCC or GND	6.0V		2.0	20	40	μA
	Supply Current	IOUT = 0 μA	9.0V		4.0	40	80	μA
			12.0V		8.0	80	160	μA

Note 4: For a power supply of 5V ±10% the worst case on resistance (RON) occurs for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current occurs for CMOS at the higher voltage and so the 5.5V values should be used.

Note 5: At supply voltages (VCC–GND) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital only when using these supply voltages.

www.fairchildsemi.com

2

AC Electrical Characteristics

VCC = 2.0V−6.0V VEE = 0V−12V, CL = 50 pF (unless otherwise specified)
Symbol	Parameter	Conditions	VCC	TA = 25°C		TA = −40 to 85°C	TA = −55 to 125°C	Units
				Typ		Guaranteed Limits
tPHL, tPLH	Maximum Propagation		2.0V	25	50	30	75	ns
	Delay Switch In to Out		4.5V	5	10	13	15	ns
			9.0V	4	8	10	12	ns
			12.0V	3	7	11	13	ns
tPZL, tPZH	Maximum Switch Turn	RL = 1 kΩ	2.0V	30	100	125	150	ns
	“ON” Delay		4.5V	12	20	25	30	ns
			9.0V	6	12	15	18	ns
			12.0V	5	10	13	15	ns
tPHZ, tPLZ	Maximum Switch Turn	RL = 1 kΩ	2.0V	60	168	210	252	ns
	“OFF” Delay		4.5V	25	36	45	54	ns
			9.0V	20	32	40	48	ns
			12.0V	15	30	38	45
fMAX	Minimum Frequency	RL = 600Ω	4.5V	40				MHz
	Response (Figure 7)	VIS = 2 VPP at (VCC/2)	9.0V	100				MHz
	20 log (VO/VI) = −3 dB	(Note 6) (Note 7)
	Crosstalk Between	RL = 600Ω, F = 1 MHz
	any Two Switches	(Note 7) (Note 8)	4.5V	−52				dB
	(Figure 8)		9.0V	−50				dB
	Peak Control to Switch	RL = 600Ω, F = 1 MHz	4.5V	100				mV
	Feedthrough Noise (Figure 9)	CL = 50 pF	9.0V	250				mV
	Switch OFF Signal	RL = 600Ω, F = 1 MHz
	Feedthrough	V(CT)VIL
	Isolation	(Note 7) (Note 8)	4.5V	−42				dB
	(Figure 10)		9.0V	−44				dB
THD	Total Harmonic	RL = 10 kΩ, CL = 50 pF,
	Distortion	F = 1 kHz
	(Figure 11)	VIS = 4 VPP	4.5V	.013				%
		VIS = 8 VPP	9.0V	.008				%
CIN	Maximum Control			5	10	10	10	pF
	Input Capacitance
CIN	Maximum Switch			20				pF
	Input Capacitance
CIN	Maximum Feedthrough	VCTL = GND		0.5				pF
	Capacitance
CPD	Power Dissipation			15				pF
	Capacitance

Note 6: Adjust 0 dBm for F = 1 kHz (Null RL/RON Attenuation).

Note 7: VIS is centered at VCC/2.

Note 8: Adjust input for 0 dBm.

MM74HC4066

3	www.fairchildsemi.com