Fairchild Semiconductor MM74HC157SJX, MM74HC157N, MM74HC157MTCX, MM74HC157SJ, MM74HC157MX Datasheet

September 1983

Revised February 1999

MM74HC157

Quad 2-Input Multiplexer

General Description

The MM74HC157 high speed Quad 2-to-1 Line data selector/Multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 10 LS-TTL loads.

This device consists of four 2-input digital multiplexers with common select and STROBE inputs. When the STROBE input is at logical “0” the four outputs assume the values as selected from the inputs. When the STROBE input is at a logical “1” the outputs assume logical “0”.

The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

Features

■Typical propagation delay: 14 ns data to any output

■Wide power supply range: 2–6V

■Low power supply quiescent current: 80 μA maximum (74HC Series)

■Fan-out of 10 LS-TTL loads

■Low input current: 1 μA maximum

Ordering Code:

Order Number	Package Number	Package Description
MM74HC157M	M16A	16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
MM74HC157SJ	M16D	16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC157MTC	MTC16	16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC157N	N16E	16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram	Function Table
Pin Assignments for DIP, SOIC, SOP and TSSOP			Inputs			Output
		Strobe	Select	A	B	Y
		H	X	X	X	L
		L	L	L	X	L
		L	L	H	X	H
		L	H	X	L	L
		L	H	X	H	H

H = HIGH Level,

L = LOW Level

X = Irrelevant

Top View

Multiplexer Input-2 Quad MM74HC157

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MM74HC157

Logic Diagram

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2

DC Output Voltage (VOUT)

−0.5 to VCC +0.5V

DC Input or Output Voltage

0

VCC

V

MM74HC157

Absolute Maximum Ratings(Note 1)

Recommended Operating

(Note 2)

Conditions

Supply Voltage (VCC)

−0.5 to +7.0V

Min

Max

Units

DC Input Voltage (VIN)

−1.5 to VCC +1.5V

Supply Voltage (V

)

2

6

V

CC

Clamp Diode Current (IIK, IOK)

±20 mA

(V

, V

)

DC Output Current, per pin (IOUT)

±25 mA

IN

OUT

−40

+85

°C

Operating Temperature Range (T )

DC VCC or GND Current, per pin (ICC)

±50 mA

A

Input Rise or Fall Times

Storage Temperature Range (TSTG)

−65°C to +150°C

(t

, t ) V

CC

= 2.0V

1000

ns

Power Dissipation (PD)

r

f

VCC = 4.5V

500

ns

(Note 3)

600 mW

VCC = 6.0V

400

ns

S.O. Package only

500 mW

Note 1: Absolute Maximum Ratings are those values beyond which dam-

Lead Temperature (TL)

age to the device may occur.

260°C

Note 2: Unless otherwise specified all voltages are referenced to ground.

(Soldering 10 seconds)

Note 3: Power Dissipation temperature derating — plastic “N” package: −

12 mW/°C from 65°C to 85°C.

DC Electrical Characteristics

(Note 4)

Symbol

Parameter

Conditions

VCC

TA = 25°C

TA = −40 to 85°C

TA = −55 to 125°C

Units

Typ

Guaranteed Limits

VIH

Minimum HIGH Level

2.0V

1.5

1.5

1.5

V

Input Voltage

4.5V

3.15

3.15

3.15

V

6.0V

4.2

4.2

4.2

V

VIL

Maximum LOW Level

2.0V

0.5

0.5

0.5

V

Input Voltage

4.5V

1.35

1.35

1.35

V

6.0V

1.8

1.8

1.8

V

VOH

Minimum HIGH Level

VIN = VIH or VIL

Output Voltage

|IOUT| ≤ 20 μA

2.0V

2.0

1.9

1.9

1.9

V

4.5V

4.5

4.4

4.4

4.4

V

6.0V

6.0

5.9

5.9

5.9

V

VIN = VIH or VIL

|IOUT| ≤ 4.0 mA

4.5V

4.2

3.98

3.84

3.7

V

|IOUT| ≤ 5.2 mA

6.0V

5.7

5.48

5.34

5.2

V

VOL

Maximum LOW Level

VIN = VIH or VIL

Output Voltage

|IOUT| ≤ 20 μA

2.0V

0

0.1

0.1

0.1

V

4.5V

0

0.1

0.1

0.1

V

6.0V

0

0.1

0.1

0.1

V

VIN = VIH or VIL

|IOUT| ≤ 4.0 mA

4.5V

0.2

0.26

0.33

0.4

V

|IOUT| ≤ 5.2 mA

6.0V

0.2

0.26

0.33

0.4

V

IIN

Maximum Input

VIN = VCC or GND

6.0V

±0.1

±1.0

±1.0

μA

Current

ICC

Maximum Quiescent

VIN = VCC or GND

6.0V

8.0

80

160

μA

Supply Current

IOUT = 0 μA

Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when

designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage cur-

rent (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.

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