September 1983
Revised February 1999
MM74HC132
Quad 2-Input NAND Schmitt Trigger
General Description
The MM74HC132 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads.
The 74HC logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
Features
■Typical propagation delay: 12 ns
■Wide power supply range: 2V–6V
■Low quiescent current: 20 μA maximum (74HC Series)
■Low input current: 1 μA maximum
■Fanout of 10 LS-TTL loads
■Typical hysteresis voltage: 0.9V at VCC=4.5V
Ordering Code:
Order Number |
Package Number |
Package Description |
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MM74HC132M |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body |
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MM74HC132SJ |
M14D |
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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MM74HC132MTC |
MTC14 |
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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MM74HC132N |
N14A |
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. (Tape and Reel not available in N14A.)
Connection Diagram |
Logic Diagram |
Pin Assignment for DIP, SOIC, SOP, and TSSOP |
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Top View
Trigger Schmitt NAND Input-2 Quad MM74HC132
© 1999 Fairchild Semiconductor Corporation |
DS005309.prf |
www.fairchildsemi.com |
MM74HC132
Absolute Maximum Ratings(Note 1)
(Note 2) |
|
Supply Voltage (VCC) |
−0.5 to +7.0V |
DC Input Voltage (VIN) |
−1.5 to VCC +1.5V |
DC Output Voltage (VOUT) |
−0.5 to VCC +0.5V |
Clamp Diode Current (IIK, IOK) |
±20 mA |
DC Output Current, per pin (IOUT) |
±25 mA |
DC VCC or GND Current, per pin (ICC) |
±50 mA |
Storage Temperature Range (TSTG) |
−65°C to +150°C |
Power Dissipation (PD) |
|
(Note 3) |
600 mW |
S.O. Package only |
500 mW |
DC Electrical Characteristics (Note 4)
Lead Temperature (TL) |
260°C |
(Soldering 10 seconds) |
Recommended Operating
Conditions
|
Min |
Max |
Units |
Supply Voltage (VCC) |
2 |
6 |
V |
DC Input or Output Voltage |
0 |
VCC |
V |
(VIN, VOUT) |
−40 |
+125 |
°C |
Operating Temperature Range (TA) |
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating — plastic “N” package: −
Symbol |
Parameter |
Conditions |
VCC |
TA = 25°C |
TA = -40 to 85°C |
TA = -40 to 125°C |
Units |
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Typ |
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Guaranteed Limits |
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VT+ |
Positive Going |
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Min |
2.0V |
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1.0 |
1.0 |
1.0 |
V |
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Threshold Voltage |
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4.5V |
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2.0 |
2.0 |
2.0 |
V |
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6.0V |
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3.0 |
3.0 |
3.0 |
V |
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Max |
2.0V |
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1.5 |
1.5 |
1.5 |
V |
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4.5V |
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3.15 |
3.15 |
3.15 |
V |
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6.0V |
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4.2 |
4.2 |
4.2 |
V |
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VT− |
Negative Going |
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Min |
2.0V |
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0.3 |
0.3 |
0.3 |
V |
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Threshold Voltage |
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4.5V |
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0.9 |
0.9 |
0.9 |
V |
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6.0V |
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1.2 |
1.2 |
1.2 |
V |
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Max |
2.0V |
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1.0 |
1.0 |
1.0 |
V |
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4.5V |
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2.2 |
2.2 |
2.2 |
V |
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6.0V |
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3.0 |
3.0 |
3.0 |
V |
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VH |
Hysteresis Voltage |
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Min |
2.0V |
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0.2 |
0.2 |
0.2 |
V |
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4.5V |
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0.4 |
0.4 |
0.4 |
V |
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6.0V |
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0.5 |
0.5 |
0.5 |
V |
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Max |
2.0V |
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1.0 |
1.0 |
1.0 |
V |
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4.5V |
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1.4 |
1.4 |
1.4 |
V |
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6.0V |
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1.5 |
1.5 |
1.5 |
V |
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VOH |
Minimum HIGH Level |
VIN = VIH or VIL |
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2.0V |
2.0 |
1.9 |
1.9 |
1.9 |
V |
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|IOUT| ≤ 20 μA |
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Output Voltage |
4.5V |
4.5 |
4.4 |
4.4 |
4.4 |
V |
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VIN = VIH or VIL |
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6.0V |
6.0 |
5.9 |
5.9 |
5.9 |
V |
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|IOUT| ≤ 4.0 mA |
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4.5V |
4.2 |
3.98 |
3.84 |
3.7 |
V |
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|IOUT| ≤ 5.2 mA |
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6.0V |
5.7 |
5.48 |
5.34 |
5.2 |
V |
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VOL |
Maximum LOW Level |
VIN = VIH or VIL |
2.0V |
0 |
0.1 |
0.1 |
0.1 |
V |
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|IOUT| ≤ 20 μA |
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Output Voltage |
4.5V |
0 |
0.1 |
0.1 |
0.1 |
V |
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VIN = VIH or VIL |
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6.0V |
0 |
0.1 |
0.1 |
0.1 |
V |
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|IOUT| ≤ 4.0 mA |
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4.5V |
0.2 |
0.26 |
0.33 |
0.4 |
V |
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|IOUT| ≤ 5.2 mA |
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6.0V |
0.2 |
0.26 |
0.33 |
0.4 |
V |
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IIN |
Maximum Input Current |
VIN = VCC or GND |
6.0V |
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±0.1 |
±1.0 |
±1.0 |
μA |
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ICC |
Maximum Quiescent |
VIN = VCC or GND |
6.0V |
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2.0 |
20 |
40 |
μA |
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Supply Current |
IOUT = 0 μA |
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Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
www.fairchildsemi.com |
2 |