Fairchild Semiconductor MM74HCT138SJ, MM74HCT138SJX, MM74HCT138MX, MM74HCT138CW, MM74HCT138M Datasheet

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February 1984

Revised February 1999

MM74HCT138

3-to-8 Line Decoder

General Description

The MM74HCT138 decoder utilizes advanced silicon-gate CMOS technology, and are well suited to memory address decoding or data routing applications. Both circuits feature high noise immunity and low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic.

The MM74HCT138 have 3 binary select inputs (A, B, and C). If the device is enabled these inputs determine which one of the eight normally HIGH outputs will go LOW. Two active LOW and one active HIGH enables (G1, G2A and G2B) are provided to ease the cascading decoders.

The decoders’ output can drive 10 low power Schottky TTL equivalent loads and are functionally and pin equivalent to

the 74LS138. All inputs are protected from damage due to static discharge by diodes to VCC and ground.

MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.

Features

TTL input compatible

Typical propagation delay: 20 ns

Low quiescent current: 80 μA maximum (74HCT Series)

Low input current: 1 μA maximum

Fanout of 10 LS-TTL loads

Ordering Code:

Order Number

Package Number

Package Description

 

 

 

MM74HCT138M

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

 

 

 

MM74HCT138SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

 

 

 

MM74HCT138MTC

MTC16

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

 

 

 

MM74HCT138N

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

 

 

 

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Pin Assignments for DIP, SOIC, SOP and TSSOP

Decoder Line 8-to-3 MM74HCT138

© 1999 Fairchild Semiconductor Corporation

DS005362.prf

www.fairchildsemi.com

Fairchild Semiconductor MM74HCT138SJ, MM74HCT138SJX, MM74HCT138MX, MM74HCT138CW, MM74HCT138M Datasheet

MM74HCT138

Truth Table

 

 

Inputs

 

 

 

Outputs

 

 

 

 

 

 

 

Enable

 

Select

 

 

 

 

 

 

 

 

 

 

 

 

G1

 

 

 

 

C B A

Y0

Y1

Y2 Y3 Y4 Y5 Y6 Y7

 

G2

 

(Note 1)

 

 

 

 

 

 

 

 

 

 

 

X

 

H

 

X X X

H H H H H H H H

L

 

X

 

X X X

H

H H H H H H H

H

 

L

 

L L L

L H

H H H H H H

H

 

L

 

L L H

H L H H H H H H

H

 

L

 

L H L

H H L H H H H H

H

 

L

 

L H H

H H H L H H H H

H

 

L

 

H L L

H H H H L H H H

H

 

L

 

H L H

H H H H H L H H

H

 

L

 

H H L

H H H H H H L H

H

 

L

 

H H H

H H H H H H H L

 

 

 

 

 

 

 

 

 

H = HIGH Level

L = LOW Level

X = Don’t Care

Note 1: G2 = G2A + G2B

Logic Diagram

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2

Absolute Maximum Ratings(Note 2)

Recommended Operating

 

 

 

 

MM74HCT138

 

 

 

 

 

(Note 3)

 

 

 

 

Conditions

 

 

 

 

 

 

 

 

Supply Voltage (VCC)

0.5 to +7.0V

 

 

 

 

 

 

 

 

Min

Max

Units

 

DC Input Voltage (VIN)

1.5 to VCC +1.5V

Supply Voltage (V

CC

)

4.5

5.5

 

V

 

DC Output Voltage (VOUT)

0.5 to VCC +0.5V

 

 

 

 

 

 

 

 

 

 

 

 

 

DC Input or Output Voltage

 

 

 

 

 

 

Clamp Diode Current (IIK, IOK)

 

±20 mA

 

(V

IN

, V

)

 

 

0

V

CC

 

V

 

DC Output Current, per pin (IOUT)

 

±25 mA

 

 

 

OUT

 

 

 

 

 

 

 

 

Operating Temperature Range (TA)

40

+85

 

°C

 

DC VCC or GND Current, per pin (ICC)

±50 mA

Input Rise or Fall Times

 

 

 

 

 

 

Storage Temperature Range (TSTG)

65°C to +150°C

 

(t , t )

 

 

 

 

 

500

 

ns

 

Power Dissipation (PD)

 

 

 

r

f

 

 

 

 

 

 

 

 

 

 

 

 

Note 2: Absolute Maximum Ratings are those values beyond which dam-

 

(Note 4)

 

600 mW

age to the device may occur.

 

 

 

 

 

 

 

Note 3: Unless otherwise specified all voltages are referenced to ground.

 

S.O. Package only

 

500 mW

 

 

Note 4: Power Dissipation temperature derating — plastic “N” package:

 

 

 

 

 

 

 

 

Lead Temperature (TL)

 

260°C

12 mW/°C from 65°C to 85°C.

 

 

 

 

 

 

(Soldering 10 seconds)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DC Electrical Characteristics

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC = 5V ±10% (unless otherwise specified)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

Parameter

Conditions

 

 

 

TA = 25°C

 

TA = −40 to 85°C

TA = −55 to 125°C

Units

 

 

 

 

 

 

 

 

 

Typ

 

 

 

Guaranteed Limits

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

 

Minimum HIGH Level

 

 

 

 

 

 

 

2.0

 

2.0

 

2.0

 

 

V

 

 

 

Input Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

 

Maximum LOW Level

 

 

 

 

 

 

 

0.8

 

0.8

 

0.8

 

 

V

 

 

 

Input Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOH

 

Minimum HIGH Level

VIN = VIH or VIL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output Voltage

|IOUT| = 20 μA

 

 

 

VCC

 

VCC0.1

VCC0.1

VCC0.1

 

V

 

 

 

 

 

|IOUT| = 4.0 mA, VCC = 4.5V

 

 

4.2

 

3.98

 

3.84

 

3.7

 

 

V

 

 

 

 

 

|IOUT| = 4.8 mA, VCC = 5.5V

 

 

5.2

 

4.98

 

4.84

 

4.7

 

 

V

 

VOL

 

Maximum LOW Level

VIN = VIH or VIL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Voltage

|IOUT| = 20 μA

 

 

 

0

 

0.1

 

0.1

 

0.1

 

 

V

 

 

 

 

 

|IOUT| = 4.0 mA, VCC = 4.5V

 

 

0.2

 

0.26

 

0.33

 

0.4

 

 

V

 

 

 

 

 

|IOUT| = 4.8 mA, VCC = 5.5V

 

 

0.2

 

0.26

 

0.33

 

0.4

 

 

V

 

IIN

 

Maximum Input

VIN = VCC or GND,

 

 

 

 

 

±0.1

 

±1.0

 

±1.0

 

 

μA

 

 

 

Current

VIH or VIL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICC

 

Maximum Quiescent

VIN = VCC or GND

 

 

 

 

 

8.0

 

80

 

160

 

 

μA

 

 

 

Supply Current

IOUT = 0 μA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN = 2.4V or 0.5V (Note 5)

 

 

 

 

 

0.3

 

0.4

 

0.5

 

 

mA

 

Note 5: This is measured per input pin. All other inputs are held at VCC or ground.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

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