Fairchild Semiconductor MM74HCT32N, MM74HCT32SJ, MM74HCT32SJX, MM74HCT32MTC, MM74HCT32MX Datasheet
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October 1987
Revised February 1999
MM74HCT32
Quad 2-Input OR Gate
General Description
The MM74HCT32 is a logic function fabricated by using advanced silicon-gate CMOS technology, which provides the inherent benefits of CMOS—low quiescent power and wide power supply range. This device is input and output characteristic and pin-out compatible with standard 74LS logic families. All inputs are protected from static discharge damage by internal diodes to VCC and ground.
MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices.
These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.
Features
■TTL, LS pin-out and threshold compatible
■Fast switching: tPLH, tPHL = 10 ns (typ)
■Low power: 10 μW at DC
■High fan-out, 10 LS-TTL loads
Ordering Code:
Order Number |
Package Number |
Package Description |
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MM74HCT32M |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow |
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MM74HCT32SJ |
M14D |
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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MM74HCT32MTC |
MTC14 |
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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MM74HCT32N |
N14A |
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001 0.300” Wide |
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Devices also available in Tape and Reel. Specify by appending suffix the letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Logic Diagram
Gate OR Input-2 Quad MM74HCT32
© 1999 Fairchild Semiconductor Corporation |
DS009396.prf |
www.fairchildsemi.com |
MM74HCT32 |
DC Output Voltage (VOUT) |
−0.5 to VCC +0.5V |
DC Input or Output Voltage |
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Absolute Maximum Ratings(Note 1) |
Recommended Operating |
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(Note 2) |
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Conditions |
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Supply Voltage (VCC) |
−0.5 to +7.0V |
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Min |
Max |
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DC Input Voltage (VIN) |
−1.5 to VCC +1.5V |
Supply Voltage (V |
CC |
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4.5 |
5.5 |
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V |
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Clamp Diode Current (IIK, IOK) |
±20 mA |
(V |
IN |
, V |
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0 |
V |
CC |
V |
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DC Output Current, per pin (IOUT) |
±25 mA |
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OUT |
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Operating Temperature Range (TA) |
−40 |
+85 |
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°C |
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DC VCC or GND Current, per pin (ICC) |
±50 mA |
Input Rise or Fall Times |
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Storage Temperature Range (TSTG) |
−65°C to +150°C |
(t , t ) |
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500 |
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ns |
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Power Dissipation (PD) |
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f |
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Note 1: Absolute Maximum Ratings are those values beyond which dam- |
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(Note 3) |
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600 mW |
age to the device may occur. |
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Note 2: Unless otherwise specified all voltages are referenced to ground. |
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S.O. Package only |
500 mW |
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Note 3: Power Dissipation temperature derating — plastic “N” package: − |
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Lead Temperature (TL) |
260°C |
12 mW/°C from 65°C to 85°C. |
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(Soldering 10 seconds) |
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DC Electrical Characteristics |
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VCC = 5V ± 10% (unless otherwise specified) |
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Symbol |
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Parameter |
Conditions |
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TA = 25°C |
TA = −40°C to +85°C |
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Units |
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Typ |
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Guaranteed Limits |
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VIH |
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Minimum HIGH Level |
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2.0 |
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2.0 |
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V |
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Input Voltage |
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VIL |
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Maximum LOW Level |
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0.8 |
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0.8 |
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V |
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Input Voltage |
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VOH |
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Minimum HIGH Level |
VIN = VIH or VIL |
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Output Voltage |
|IOUT| = 20 μA |
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VCC |
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VCC − 0.1 |
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VCC − 0.1 |
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V |
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|IOUT| = 4.0 mA, VCC = 4.5V |
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4.2 |
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3.98 |
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3.84 |
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V |
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|IOUT| = 4.8 mA, VCC = 5.5V |
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5.2 |
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4.98 |
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4.84 |
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V |
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VOL |
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Maximum LOW Level |
VIN = VIH |
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Voltage |
|IOUT| = 20 μA |
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0 |
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0.1 |
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0.1 |
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V |
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|IOUT| = 4.0 mA, VCC = 4.5V |
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0.2 |
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0.26 |
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0.33 |
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V |
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|IOUT| = 4.8 mA, VCC = 5.5V |
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0.2 |
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0.26 |
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0.33 |
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V |
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IIN |
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Maximum Input |
VIN = VCC or GND, VIH or VIL |
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± 0.1 |
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± 1.0 |
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μA |
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Current |
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ICC |
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Maximum Quiescent |
VIN = VCC or GND |
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2.0 |
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20 |
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μA |
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Supply Current |
IOUT = 0 μA |
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VIN = 2.4V or 0.5V (Note 4) |
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1.2 |
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1.4 |
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mA |
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Note 4: This is measured per input with all other inputs held at VCC or ground. |
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www.fairchildsemi.com |
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