Fairchild Semiconductor MM74HCT245WMX, MM74HCT245N, MM74HCT245SJ, MM74HCT245MTC, MM74HCT245WM Datasheet
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February 1984
Revised February 1999
MM74HCT245
Octal 3-STATE Transceiver
General Description
The MM74HCT245 3-STATE bi-directional buffer utilizes advanced silicon-gate CMOS technology and is intended for two-way asynchronous communication between data buses. It has high drive current outputs which enable high speed operation even when driving large bus capacitances. This circuit possesses the low power consumption of CMOS circuitry, yet has speeds comparable to low power Schottky TTL circuits.
This device is TTL input compatible and can drive up to 15 LS-TTL loads, and all inputs are protected from damage due to static discharge by diodes to VCC and ground.
The MM74HCT245 has one active low enable input (G), and a direction control (DIR). When the DIR input is HIGH,
data flows from the A inputs to the B outputs. When DIR is LOW, data flows from B to A.
MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.
Features
■TTL input compatible
■3-STATE outputs for connection to system busses
■High output drive current: 6 mA (min)
■High speed: 16 ns typical propagation delay
■Low power: 80 μA (74HCT Series)
Ordering Code:
Order Number |
Package Number |
Package Description |
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MM74HCT245WM |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide |
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MM74HCT245SJ |
M20D |
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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MM74HCT245MTC |
MTC20 |
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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MM74HCT245N |
N20A |
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram |
Truth Table |
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Pin Assignments for DIP, SOIC, SOP and TSSOP |
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Control |
Operation |
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Inputs |
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DIR |
245 |
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G |
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L |
L |
B data to A bus |
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L |
H |
A data to B bus |
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H |
X |
isolation |
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H = HIGH Level |
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L = LOW Level |
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X = Irrelevant |
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Top View
Transceiver STATE-3 Octal MM74HCT245
© 1999 Fairchild Semiconductor Corporation |
DS005366.prf |
www.fairchildsemi.com |
MM74HCT245
Logic Diagram
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 1)
(Note 2) |
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Supply Voltage (VCC) |
−0.5 to +7.0V |
DC Input Voltage (VIN) |
−1.5 to VCC +1.5V |
DC Output Voltage (VOUT) |
−0.5 to VCC +0.5V |
Clamp Diode Current (IIK, IOK) |
±20 mA |
DC Output Current, |
±35 mA |
DC VCC or GND Current, per pin (ICC) |
±70 mA |
Storage Temperature Range (TSTG) |
−65°C to +150°C |
Power Dissipation (PD) |
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(Note 3) |
600 mW |
S.O. Package only |
500 mW |
Lead Temperature (TL) |
260°C |
(Soldering 10 seconds) |
Recommended Operating
Conditions
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Min |
Max |
Units |
Supply Voltage (VCC) |
4.5 |
5.5 |
V |
DC Input or Output Voltage |
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(VIN, VOUT) |
0 |
VCC |
V |
Operating Temperature Range (TA) |
−40 |
+85 |
°C |
Input Rise or Fall Times |
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(tr, tf) |
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500 |
ns |
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C.
DC Electrical Characteristics
(VCC = 5V ± 10%, unless otherwise specified.) |
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Symbol |
Parameter |
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Conditions |
TA = 25°C |
TA = −40 to 85°C |
TA = −55 to 125°C |
Units |
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Typ |
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Guaranteed Limits |
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VIH |
Minimum HIGH Level |
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2.0 |
2.0 |
2.0 |
V |
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Input Voltage |
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VIL |
Maximum LOW Level |
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0.8 |
0.8 |
0.8 |
V |
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Input Voltage |
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VOH |
Minimum HIGH Level |
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VIN = VIH or VIL |
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Output Voltage |
|IOUT| = 20 μA |
VCC |
VCC− 0.1 |
VCC− 0.1 |
VCC− 0.1 |
V |
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|IOUT| = 6.0 mA, VCC = 4.5V |
4.2 |
3.98 |
3.84 |
3.7 |
V |
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|IOUT| = 7.2 mA, VCC = 5.5V |
5.2 |
4.98 |
4.84 |
4.7 |
V |
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VOL |
Maximum LOW Level |
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VIN = VIH or VIL |
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Voltage |
|IOUT| = 20 μA |
0 |
0.1 |
0.1 |
0.1 |
V |
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|IOUT| = 6.0 mA, VCC = 4.5V |
0.2 |
0.26 |
0.33 |
0.4 |
V |
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|IOUT| = 7.2 mA, VCC = 5.5V |
0.2 |
0.26 |
0.33 |
0.4 |
V |
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IIN |
Maximum Input |
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VIN = VCC or GND, |
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±0.1 |
±1.0 |
±1.0 |
μA |
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Current |
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VIH or VIL, Pin 1 or 19 |
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IOZ |
Maximum 3-STATE |
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VOUT = VCC or GND |
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±0.5 |
±5.0 |
±10 |
μA |
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Output Leakage |
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= VIH |
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G |
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Current |
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ICC |
Maximum Quiescent |
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VIN = VCC or GND |
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8 |
80 |
160 |
μA |
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Supply Current |
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IOUT = 0 μA |
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VIN = 2.4V or 0.5V (Note 4) |
0.6 |
1.0 |
1.3 |
1.5 |
mA |
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Note 4: Measured per input. All other inputs at VCC or ground.
MM74HCT245
3 |
www.fairchildsemi.com |
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