Fairchild Semiconductor MM74HCT05MTC, MM74HCT05CW, MM74HCT05SJX, MM74HCT05MTCX, MM74HCT05MX Datasheet

February 1984

Revised February 1999

MM74HCT05

Hex Inverter (Open Drain)

General Description

The MM74HCT05 is a logic function fabricated by using advanced silicon-gate CMOS technology, which provides the inherent benefits of CMOS—low quiescent power and wide power supply range. The device is also input and output characteristic and pinout compatible with standard DM74LS logic families. The MM74HCT05 open drain Hex Inverter requires the addition of an external resistor to perform a wire-NOR function.

All inputs are protected from static discharge damage by internal diodes to VCC and ground.

MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices.

These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.

Features

■Open drain for wire-NOR function

■LS-TTL pinout and threshold compatible

■Fanout of 10 LS-TTL loads

■Typical propagation delays:

tPLH (with 1 kΩ resistor) 10 ns tPHL (with 1 kΩ resistor) 8 ns

Ordering Code:

Order Number	Package Number	Package Description
MM74HCT05M	M14A	14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74HCT05SJ	M14D	14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCT05MTC	MTC14	14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HCT05N	N14A	14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram	Logic Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP

Typical Application

Top View

Drain) (Open Inverter Hex MM74HCT05

© 1999 Fairchild Semiconductor Corporation

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MM74HCT05

Absolute Maximum Ratings(Note 1)

(Note 2)
Supply Voltage (VCC)	−0.5 to +7.0V
DC Input Voltage (VIN)	−1.5 to VCC +1.5V
DC Output Voltage (VOUT)	−0.5 to VCC +0.5V
Clamp Diode Current (IIK, IOK)	± 20 mA
DC Output Current, per pin (IOUT)	± 25 mA
DC VCC or GND Current, per pin (ICC)	± 50 mA
Storage Temperature Range (TSTG)	−65°C to +150°C
Power Dissipation (PD)
(Note 3)	600 mW
S.O. Package only	500 mW
Lead Temperature (TL)	260°C
(Soldering 10 seconds)

Recommended Operating

Conditions

	Min	Max	Units
Supply Voltage (VCC)	4.5	5.5	V
DC Input or Output Voltage
(VIN, VOUT)	0	VCC	V
Operating Temperature Range (TA)	−40	+85	°C
Input Rise or Fall Times
(tr, tf)		500	ns

Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.

Note 2: Unless otherwise specified all voltages are referenced to ground.

Note 3: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C.

DC Electrical Characteristics

(VCC = 5V ± 10%,unless otherwise specified)
Symbol	Parameter	Conditions	TA = 25°C		TA = −40 to 85°C	Units
			Typ	Guaranteed Limits
VIH	Minimum HIGH Level			2.0	2.0	V
	Input Voltage
VIL	Maximum LOW Level			0.8	0.8	V
	Input Voltage
VOL	Maximum LOW	VIN = VIH
	Level Voltage	|IOUT| = 20 μA	0	0.1	0.1	V
		|IOUT| = 4.0 mA, VCC = 4.5V	0.2	0.26	0.33	V
		|IOUT| = 4.8 mA, VCC = 5.5V	0.2	0.26	0.33	V
IIN	Maximum Input	VIN = VCC or GND,		± 0.1	± 1.0	μA
	Current	VIH or VIL
ILKG	Maximum HIGH Level	VIN = VIH or VIL, VOUT = VCC		0.5	5.0	μA
	Output Leakage
	Current
ICC	Maximum Quiescent	VIN = VCC or GND		2.0	20	μA
	Supply Current	IOUT = 0μA
		VIN = 2.4V or 0.5V		0.3	0.4	mA
		(Note 4)

Note 4: This is measured per input with all other inputs held at VCC or ground.

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