Fairchild Semiconductor MM74HCU04MX, MM74HCU04N, MM74HCU04SJ, MM74HCU04SJX, MM74HCU04CW Datasheet

September 1983

Revised February 1999

MM74HCU04

Hex Inverter

General Description

The MM74HCU04 inverters utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits.

The MM74HCU04 is an unbuffered inverter. It has high noise immunity and the ability to drive 15 LS-TTL loads. The 74HCU logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs

are protected from damage due to static discharge by internal diode clamps to VCC and ground.

Features

■Typical propagation delay: 7 ns

■Fanout of 15 LS-TTL loads

■Quiescent power consumption: 10 μA maximum at room temperature

■Low input current: 1 μA maximum

Ordering Code:

Order Number	Package Number	Package Description
MM74HCU04M	M14A	14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74HCU04SJ	M14D	14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCU04MTC	MTC14	14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HCU04N	N14A	14-Lead Plastic Dual-In-Lead Package (PDIP), JEDEC MS-001, 0.300” Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram	Schematic Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP

Top View

Inverter Hex MM74HCU04

© 1999 Fairchild Semiconductor Corporation

DS005296.prf

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MM74HCU04

Absolute Maximum Ratings(Note 1)

(Note 2)
Supply Voltage (VCC)	−0.5 to +7.0V
DC Input Voltage (VIN)	−1.5 to VCC +1.5V
DC Output Voltage (VOUT)	−0.5 to VCC +0.5V
Clamp Diode Current (IIK, IOK)	±20 mA
DC Output Current, per pin (IOUT)	±25 mA
DC VCC or GND Current, per pin (ICC)	±50 mA
Storage Temperature Range (TSTG)	−65°C to +150°C
Power Dissipation (PD)
(Note 3)	600 mW
S.O. Package only	500 mW
Lead Temperature (TL)	260°C
(Soldering 10 seconds)

DC Electrical Characteristics (Note 4)

Recommended Operating

Conditions

	Min	Max	Units
Supply Voltage (VCC)	2	6	V
DC Input or Output Voltage	0	VCC	V
(VIN, VOUT)	−40	+85	°C
Operating Temperature Range (TA)

Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.

Note 2: Unless otherwise specified all voltages are referenced to ground.

Note 3: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C.

Symbol	Parameter	Conditions	VCC	TA = 25°C		TA = −40 to 85°C	TA = −55 to 125°C	Units
				Typ		Guaranteed Limits
VIH	Minimum HIGH Level		2.0V		1.7	1.7	1.7	V
	Input Voltage		4.5V		3.6	3.6	3.6	V
			6.0V		4.8	4.8	4.8	V
VIL	Maximum LOW Level		2.0V		0.3	0.3	0.3	V
	Input Voltage		4.5V		0.8	0.8	0.8	V
			6.0V		1.1	1.1	1.1	V
VOH	Minimum HIGH Level	VIN = VIL
	Output Voltage	|IOUT| ≤ 20 μA	2.0V	2.0	1.8	1.8	1.8	V
			4.5V	4.5	4.0	4.0	4.0	V
			6.0V	6.0	5.5	5.5	5.5	V
		VIN = GND
		|IOUT| ≤ 4.0 mA	4.5V	4.2	3.98	3.84	3.7	V
		|IOUT| ≤ 5.2 mA	6.0V	5.7	5.48	5.34	5.2	V
VOL	Maximum LOW Level	VIN = VIH
	Output Voltage	|IOUT| ≤ 20 μA	2.0V	0	0.2	0.2	0.2	V
			4.5V	0	0.5	0.5	0.5	V
			6.0V	0	0.5	0.5	0.5	V
		VIN = VCC
		|IOUT| ≤ 6.0 mA	4.5V	0.2	0.26	0.33	0.4	V
		|IOUT| ≤ 7.8 mA	6.0V	0.2	0.26	0.33	0.4	V
IIN	Maximum Input	VIN = VCC or GND	6.0V		±0.1	±1.0	±1.0	μA
	Current
ICC	Maximum Quiescent	VIN = VCC or GND	6.0V		2.0	20	40	μA
	Supply Current	IOUT = 0 μA

Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.

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