Fairchild Semiconductor MM74HC08SJ, MM74HC08SJX, MM74HC08N, MM74HC08M, MM74HC08MTC Datasheet

September 1983

Revised December 1999

MM74HC08

Quad 2-Input AND Gate

General Description

The MM74HC08 AND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. The HC08 has buffered outputs, providing high noise immunity and the ability to drive 10 LS-TTL loads. The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

Features

■Typical propagation delay: 7 ns (tPHL), 12 ns (tPLH)

■Fanout of 10 LS-TTL loads

■Quiescent power consumption: 2 μA maximum at room temperature

■Low input current: 1 μA maximum

Ordering Code:

Order Number	Package Number	Package Description
MM74HC08M	M14A	14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Wide
MM74HC08SJ	M14D	14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC08MTC	MTC14	14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC08N	N14A	14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. (Tape and Reel not available in N14A)

Connection Diagram

Top View

Gate AND Input-2 Quad MM74HC08

© 1999 Fairchild Semiconductor Corporation

DS005297

www.fairchildsemi.com

MM74HC08

Absolute Maximum Ratings(Note 1)

Recommended Operating

(Note 2)

Conditions

Supply Voltage (VCC)

−0.5 to +7.0V

Min

Max

Units

DC Input Voltage (VIN)

−1.5 to VCC +1.5V

Supply Voltage (VCC)

2

6

V

DC Output Voltage (VOUT)

−0.5 to VCC +0.5V

DC Input or Output Voltage

0

V

V

Clamp Diode Current (IIK, IOK)

±20 mA

CC

(V

IN

, V

)

DC Output Current, per pin (IOUT)

±25 mA

OUT

Operating Temperature Range (T )

−40

+85

°C

DC VCC or GND Current, per pin

A

Input Rise or Fall Times

(ICC)

±50 mA

(t , t )

V

CC

= 2.0V

1000

ns

Storage Temperature Range (TSTG)

−65°C to +150°C

r

f

VCC = 4.5V

500

ns

Power Dissipation (PD)

VCC = 6.0V

400

ns

(Note 3)

600 mW Note 1: Absolute Maximum Ratings are those values beyond which dam-

S.O. Package only

500 mW

age to the device may occur.

Note 2: Unless otherwise specified all voltages are referenced to ground.

Lead Temperature (TL)

Note 3: Power Dissipation temperature derating — plastic “N” package: −

(Soldering 10 seconds)

260°C 12 mW/°C from 65°C to 85°C.

DC Electrical Characteristics (Note 4)

VCC

TA = 25°C

TA = −40 to 85°C

TA = −40 to 125°C

Symbol

Parameter

Conditions

Units

Typ

Guaranteed Limits

VIH

Minimum HIGH Level

2.0V

1.5

1.5

1.5

V

Input Voltage

4.5V

3.15

3.15

3.15

V

6.0V

4.2

4.2

4.2

V

VIL

Maximum LOW Level

2.0V

0.5

0.5

0.5

V

Input Voltage

4.5V

1.35

1.35

1.35

V

6.0V

1.8

1.8

1.8

V

VOH

Minimum HIGH Level

VIN = VIH

Output Voltage

|IOUT| ≤ 20 μA

2.0V

2.0

1.9

1.9

1.9

V

4.5V

4.5

4.4

4.4

4.4

V

6.0V

6.0

5.9

5.9

5.9

V

VIN = VIH

|IOUT| ≤ 4.0 mA

4.5V

4.2

3.98

3.84

3.7

V

|IOUT| ≤ 5.2 mA

6.0V

5.7

5.48

5.34

5.2

V

VOL

Maximum LOW Level

VIN = VIH or VIL

Output Voltage

|IOUT| ≤ 20 μA

2.0V

0

0.1

0.1

0.1

V

4.5V

0

0.1

0.1

0.1

V

6.0V

0

0.1

0.1

0.1

V

VIN = VIH or VIL

|IOUT| ≤ 4.0 mA

4.5V

0.2

0.26

0.33

0.4

V

|IOUT| ≤ 5.2 mA

6.0V

0.2

0.26

0.33

0.4

V

IIN

Maximum Input Current

VIN = VCC or GND

6.0V

±0.1

±1.0

±1.0

μA

ICC

Maximum Quiescent Supply Current

VIN = VCC or GND

6.0V

2.0

20

40

μA

IOUT = 0 μA

Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.

www.fairchildsemi.com

2

AC Electrical Characteristics						MM74HC08
VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns
Symbol	Parameter	Conditions	Typ	Guaranteed	Units
				Limit
tPHL	Maximum Propagation		12	20	ns
	Delay, Output HIGH-to-LOW
tPLH	Maximum Propagation		7	15	ns
	Delay, Output LOW-to-HIGH

AC Electrical Characteristics

VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified)

	Symbol	Parameter	Conditions	VCC	TA = 25°C		TA = −40 to 125°C	Units
					Typ	Guaranteed Limits
	tPHL	Maximum Propagation Delay,		2.0V	77	121	175	ns
		Output HIGH-to-LOW		4.5V	15	24	35	ns
				6.0V	13	20	30	ns
	tPLH	Maximum Propagation Delay,		2.0V	30	90	134	ns
		Output LOW-to-HIGH		4.5V	10	18	27	ns
				6.0V	8	15	23	ns
	tTLH, tTHL	Maximum Output		2.0V	30	75	110	ns
		Rise and Fall Time		4.5V	8	15	22	ns
				6.0V	7	13	19	ns
	CPD	Power Dissipation Capacitance (Note 5)	(per gate)		38			pF
	CIN	Maximum Input Capacitance			4	10	10	pF

Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC.

3	www.fairchildsemi.com