SN54ALS576B, SN54AS576 SN74ALS576B, SN74ALS577A, SN74AS576 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B ± DECEMBER 1982 ± REVISED JANUARY 1995
• 3-State Buffer-Type Inverting Outputs Drive |
SN54ALS576B, SN54AS576 . . . J OR W PACKAGE |
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Bus Lines Directly |
SN74ALS576B, SN74AS576 . . . DW OR N PACKAGE |
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• Bus-Structured Pinout |
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(TOP VIEW) |
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• Buffered Control Inputs |
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VCC |
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OE |
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• SN74ALS577A Has Synchronous Clear |
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1D |
2 |
19 |
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1Q |
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• Package Options Include Plastic |
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2D |
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3 |
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2Q |
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3D |
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3Q |
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Small-Outline (DW) Packages, Ceramic |
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4D |
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Chip Carriers (FK), Standard Plastic (N, NT) |
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5D |
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and Ceramic (J) 300-mil DIPs, and Ceramic |
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5Q |
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6D |
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Flat (W) Packages |
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6Q |
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7D |
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description |
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7Q |
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8D |
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9 |
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These octal D-type edge-triggered flip-flops |
GND |
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CLK |
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feature 3-state outputs designed specifically for |
SN54ALS576B, SN54AS576 . . . FK PACKAGE |
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bus driving. They |
are particularly suitable for |
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implementing buffer registers, I/O ports, |
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(TOP VIEW) |
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bidirectional bus drivers, and working registers. |
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2D |
1D |
OE |
CC |
1Q |
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These flip-flops enter data on the low-to-high |
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transition of the clock (CLK) input. |
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2 |
1 |
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The output-enable |
(OE) input does not |
affect |
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4D |
5 |
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17 |
3Q |
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internal operations of the flip-flops. Old data can |
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5D |
6 |
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16 |
4Q |
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be retained or new data can be entered while the |
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6D |
7 |
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15 |
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outputs are disabled. |
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7D |
8 |
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14 |
6Q |
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The SN54ALS576B and SN54AS576 are |
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10 11 12 13 |
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characterized for operation over the full military |
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GND |
CLK |
8Q |
7Q |
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temperature range of ±55°C to 125°C. The |
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SN74ALS576B, |
SN74ALS577A, |
and |
SN74ALS577A . . . DW OR NT PACKAGE |
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SN74AS576 are characterized for operation from |
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0°C to 70°C. |
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(TOP VIEW) |
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CLR |
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24 |
VCC |
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OE |
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23 |
NC |
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1D |
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3 |
22 |
1Q |
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2D |
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4 |
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2Q |
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3D |
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5 |
20 |
3Q |
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4D |
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6 |
19 |
4Q |
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5D |
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7 |
18 |
5Q |
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6D |
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8 |
17 |
6Q |
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7D |
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9 |
16 |
7Q |
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8D |
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10 |
15 |
8Q |
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NC |
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14 |
CLK |
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GND |
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NC |
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NC ± No internal connection
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1995, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
1 |
SN54ALS576B, SN54AS576 SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B ± DECEMBER 1982 ± REVISED JANUARY 1995
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Function Tables |
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′ALS576B, ′AS576 |
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(each flip-flop) |
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INPUTS |
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OUTPUT |
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CLK |
D |
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Q |
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OE |
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L |
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↑ |
H |
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L |
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↑ |
L |
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H |
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L |
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X |
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0 |
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H |
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X |
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SN74ALS577A |
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(each flip-flop) |
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INPUTS |
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OUTPUT |
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CLK |
D |
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Q |
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OE |
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CLR |
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L |
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↑ |
X |
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H |
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L |
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↑ |
H |
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L |
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↑ |
L |
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H |
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X |
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Q |
0 |
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H |
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X |
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X |
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Z |
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logic symbols² |
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′ALS576B, ′AS576 |
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SN74ALS577A |
1 |
EN |
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2 |
EN |
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OE |
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OE |
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11 |
C1 |
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14 |
C1 |
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CLK |
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CLK |
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2 |
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19 |
1 |
1R |
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1D |
CLR |
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1D |
1Q |
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3 |
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18 |
3 |
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22 |
2D |
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2Q |
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1D |
1D |
1Q |
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4 |
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3D |
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3Q |
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2D |
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5 |
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16 |
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20 |
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4D |
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6 |
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15 |
3D |
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5D |
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5Q |
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4D |
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7 |
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7 |
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6D |
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5D |
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8 |
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7D |
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6D |
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9 |
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8D |
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7D |
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10 |
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² These symbols are in accordance with ANSI/IEEE Std 91-1984 and |
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IEC Publication 617-12. |
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Pin numbers shown for the ′ALS576B and ′AS576 are for the DW, |
Pin numbers shown for the SN74ALS577A are for the DW and NT |
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J, N, and W packages. |
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packages. |
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2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
SN54ALS576B, SN54AS576 SN74ALS576B, SN74ALS577A, SN74AS576 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
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SDAS065B ± DECEMBER 1982 ± REVISED JANUARY 1995 |
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logic diagrams (positive logic) |
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′ALS576B, ′AS576 |
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SN74ALS577A |
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OE |
1 |
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2 |
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OE |
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CLK |
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14 |
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CLK |
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1 |
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C1 |
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CLR |
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1Q |
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1D |
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1D |
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C1 |
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3 |
1D |
1Q |
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1D |
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To Seven Other Channels |
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Pin numbers shown are for the DW, J, N, and W packages.
To Seven Other Channels
Pin numbers shown are for the DW and NT packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . 7 |
V |
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . 7 |
V |
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . 5.5 |
V |
Operating free-air temperature range, TA: SN54ALS576B . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±55°C to 125°C |
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SN74ALS576B, SN74ALS577A . . . . . . . . . . . . . . . |
. . 0°C to 70°C |
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Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±65°C to 150°C |
²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
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SN54ALS576B |
SN74ALS576B |
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SN74ALS577A |
UNIT |
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MIN |
NOM |
MAX |
MIN |
NOM |
MAX |
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VCC |
Supply voltage |
4.5 |
5 |
5.5 |
4.5 |
5 |
5.5 |
V |
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VIH |
High-level input voltage |
2 |
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2 |
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V |
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VIL |
Low-level input voltage |
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0.7 |
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0.8 |
V |
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IOH |
High-level output current |
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± 1 |
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± 2.6 |
mA |
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IOL |
Low-level output current |
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12 |
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24 |
mA |
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fclock |
Clock frequency |
′ALS576B |
0 |
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22 |
0 |
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30 |
MHz |
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SN74ALS577A |
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0 |
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tw |
Pulse duration |
′ALS576B, CLK high or low |
25 |
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16.5 |
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ns |
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SN74ALS577A, CLK high or low |
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16.5 |
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tsu |
Setup time before CLK↑ |
Data |
15 |
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15 |
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ns |
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SN74ALS577A CLR |
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15 |
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th |
Hold time after CLK↑ |
Data |
4 |
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0 |
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ns |
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SN74ALS577A CLR |
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TA |
Operating free-air temperature |
± 55 |
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125 |
0 |
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70 |
°C |
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
3 |