MOTOROLA MC10H131MEL, MC10H131ML1, MC10H131ML2, MC10H131MR1, MC10H131MR2 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Dual D Type Master-Slave

Flip-Flop

The MC10H131 is a MECL 10H part which is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in clock speed and propagation delay and no increase in power±supply current.

•Propagation Delay, 1.0 ns Typical

•Power Dissipation, 235 mW Typical

•Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range)

•Voltage Compensated

•MECL 10K±Compatible

MAXIMUM RATINGS

Characteristic	Symbol	Rating	Unit
Power Supply (VCC = 0)	VEE	±8.0 to 0	Vdc
Input Voltage (VCC = 0)	VI	0 to VEE	Vdc
Output Current Ð Continuous	Iout	50	mA
Ð Surge		100
Operating Temperature Range	TA	0 to +75	°C
Storage Temperature Range Ð Plastic	Tstg	±55 to +150	°C
Ð Ceramic		±55 to +165	°C

ELECTRICAL CHARACTERISTICS (VEE = ±5.2 V ±5%) (See Note)

			0°		25°			75°
Characteristic	Symbol	Min		Max	Min	Max	Min		Max	Unit
Power Supply Current	IE	Ð		62	Ð	56	Ð		62	mA
Input Current High	IinH									μA
Pins 6, 11		Ð		530	Ð	310	Ð		310
Pin 9		Ð		660	Ð	390	Ð		390
Pins 7, 10		Ð		485	Ð	285	Ð		285
Pins 4, 5, 12, 13		Ð		790	Ð	465	Ð		465
Input Current Low	IinL	0.5		Ð	0.5	Ð	0.3		Ð	μA
High Output Voltage	VOH	±1.02		±0.84	±0.98	±0.81	±0.92		±0.735	Vdc
Low Output Voltage	VOL	±1.95		±1.63	±1.95	±1.63	±1.95		±1.60	Vdc
High Input Voltage	VIH	±1.17		±0.84	±1.13	±0.81	±1.07		±0.735	Vdc
Low Input Voltage	VIL	±1.95		±1.48	±1.95	±1.48	±1.95		±1.45	Vdc
AC PARAMETERS
Propagation Delay	tpd									ns
Clock, CE		0.8		1.6	0.8	1.7	0.8		1.8
Set, Reset		0.6		1.6	0.7	1.7	0.7		1.8
Rise Time	tr	0.6		2.0	0.6	2.0	0.6		2.2	ns
Fall Time	tf	0.6		2.0	0.6	2.0	0.6		2.2	ns
Set±up Time	tset	0.7		Ð	0.7	Ð	0.7		Ð	ns
Hold Time	thold	0.8		Ð	0.8	Ð	0.8		Ð	ns
Toggle Frequency	ftog	250		Ð	250	Ð	250		Ð	MHz

NOTE:

Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through a 50±ohm resistor to ±2.0 volts.

MC10H131

L SUFFIX

CERAMIC PACKAGE

CASE 620±10

P SUFFIX

PLASTIC PACKAGE

CASE 648±08

FN SUFFIX

PLCC

CASE 775±02

LOGIC DIAGRAM

	S1				5													2
	D1				7								Q1
CE1					6													3
													Q1
	R1				4											VCC1 = PIN 1
	CC				9											VCC2 = PIN 16
	R2			13												VEE = PIN 8
																		14
													Q2
CE2 11
	D2			10									Q2					15
	S2			12

RS TRUTH TABLE					CLOCKED TRUTH TABLE
					C			D	Qn+1
R	S		Qn+1
					L			X	Qn
L	L		Qn
					H			L	L
L	H		H
					H			H	H
H	L		L
					C = CE + CC
H	H		N.D.
N.D. = Not Defined				A clock H is a clock					transition
				from a low to a high state.

DIP

PIN ASSIGNMENT

VCC1						1		16		VCC2
						2		15
		Q1								Q2
						3		14
		Q1								Q2
		R1				4		13		R2
			S1			5		12		S2
						6		11
	CE1									CE2
						7		10
		D1								D2
VEE						8		9		CC

Pin assignment is for Dual±in±Line Package.

For PLCC pin assignment, see the Pin Conversion

Tables on page 6±11 of the Motorola MECL Data

Book (DL122/D).

3/93

Motorola, Inc. 1996

2±69

REV 5

MC10H131

APPLICATION INFORMATION

The MC10H131 is a dual master±slave type D flip±flop. Asynchronous Set (S) and Reset (R) override Clock (CC) and Clock Enable (CE) inputs. Each flip±flop may be clocked separately by holding the common clock in the new low state and using the enable inputs for the clocking function. If the common clock is to be used to clock the flip±flop, the Clock Enable inputs must be in the low state.

In this case, the enable inputs perform the function of controlling the common clock.

The output states of the flip±flop change on the positive transition of the clock. A change in the information present at the data (D) input will not affect the output information at any other time due to master slave construction.

MOTOROLA	2±70	MECL Data
		DL122 Ð Rev 6