Fairchild Semiconductor 74AC257SJX, 74AC257SJ, 74AC257SCX, 74AC257SC, 74AC257PC Datasheet
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November 1988
Revised November 1999
74AC257 • 74ACT257
Quad 2-Input Multiplexer with 3-STATE Outputs
General Description
The AC/ACT257 is a quad 2-input multiplexer with 3- STATE outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present the selected data in true (noninverted) form. The outputs may be switched to a high impedance state by placing a logic HIGH on the common Output Enable (OE) input, allowing the outputs to interface directly with bus-ori- ented systems.
Features
■ICC and IOZ reduced by 50%
■Multiplexer expansion by tying outputs together
■Noninverting 3-STATE outputs
■Outputs source/sink 24 mA
■ACT257 has TTL-compatible inputs
Ordering Code:
Order Number |
Package Number |
Package Description |
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74AC257SC |
M16A |
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body |
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74AC257SJ |
M16D |
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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74AC257MTC |
MTC16 |
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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74AC257PC |
N16E |
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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74ACT257SC |
M16A |
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body |
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74ACT257SJ |
M16D |
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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74ACT257MTC |
MTC16 |
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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74ACT257PC |
N16E |
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols |
Connection Diagram |
IEEE/IEC
Pin Descriptions
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Pin Names |
Description |
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S |
Common Data Select Input |
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3-STATE Output Enable Input |
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OE |
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I0a–I0d |
Data Inputs from Source 0 |
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I1a–I1d |
Data Inputs from Source 1 |
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Za–Zd |
3-STATE Multiplexer Outputs |
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FACT is a trademark of Fairchild Semiconductor Corporation.
Outputs STATE-3 with Multiplexer Input-2 Quad 74ACT257 • 74AC257
© 1999 Fairchild Semiconductor Corporation |
DS009949 |
www.fairchildsemi.com |
74AC257 • 74ACT257
Functional Description
The AC/ACT257 is quad 2-input multiplexer with 3-STATE outputs. It selects four bits of data from two sources under control of a Common Data Select input. When the Select input is LOW, the I0x inputs are selected and when Select is HIGH, the I1x inputs are selected. The data on the selected inputs appears at the outputs in true (noninverted) form. The device is the logic implementation of a 4-pole, 2- position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are as follows:
Za = OE • (11a • S + I0a • S)
Zb = OE • (11b • S + I0b • S)
Zc = OE • (11c • S + I0c • S)
Zd = OE • (11d • S + I0d • S)
When the Output Enable (OE) is HIGH, the outputs are forced to a high impedance state. If the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure the Output Enable signals to 3-STATE devices whose outputs are tied together are designed so there is no overlap.
Logic Diagram
Truth Table
Output |
Select |
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Data |
Outputs |
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Enable |
Input |
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Inputs |
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OE |
S |
I0 |
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I1 |
Z |
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H |
X |
X |
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X |
Z |
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L |
H |
X |
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L |
L |
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L |
H |
X |
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H |
H |
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L |
L |
L |
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X |
L |
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L |
L |
H |
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X |
H |
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H = |
HIGH Voltage Level |
L = |
LOW Voltage Level |
X = |
Immaterial |
Z = |
High Impedance |
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) |
− 0.5V to + 7.0V |
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DC Input Diode Current (IIK) |
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VI = |
− 0.5V |
− 20 mA |
VI = |
VCC + 0.5V |
+ 20 mA |
DC Input Voltage (VI) |
− 0.5V to VCC + 0.5V |
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DC Output Diode Current (IOK) |
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VO = |
− 0.5V |
− 20 mA |
VO = |
VCC + 0.5V |
+ 20 mA |
DC Output Voltage (VO) |
− 0.5V to VCC + 0.5V |
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DC Output Source ort |
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Sink Curren (IO) |
± 50 mA |
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DC VCC or Ground Current |
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Per Output Pin (ICC or IGND) |
± 50 mA |
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Storage Temperature (TSTG) |
− 65° C to + 150° C |
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Junction Temperature (TJ) |
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PDIP |
140° C |
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Recommended Operating
Conditions
Supply Voltage (VCC) |
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AC |
2.0V to 6.0V |
ACT |
4.5V to 5.5V |
Input Voltage (VI) |
0V to VCC |
Output Voltage (VO) |
0V to VCC |
Operating Temperature (TA) |
− 40° C to + 85° C |
Minimum Input Edge Rate (∆ V/∆ t) |
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AC Devices |
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VIN from 30% to 70% of VCC |
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VCC @ 3.3V, 4.5V, 5.5V |
125 mV/ns |
Minimum Input Edge Rate (∆ V/∆ t) |
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ACT Devices |
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VIN from 0.8V to 2.0V |
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VCC @ 4.5V, 5.5V |
125 mV/ns |
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for AC
Symbol |
Parameter |
VCC |
TA = + 25° C |
TA = − 40° C to + 85° C |
Units |
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Conditions |
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(V) |
Typ |
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Guaranteed Limits |
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VIH |
Minimum HIGH Level |
3.0 |
1.5 |
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2.1 |
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2.1 |
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VOUT = |
0.1V |
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Voltage Input |
4.5 |
2.25 |
3.15 |
3.15 |
V |
or VCC − |
0.1V |
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5.5 |
2.75 |
3.85 |
3.85 |
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VIL |
Maximum LOW Level |
3.0 |
1.5 |
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0.9 |
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0.9 |
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VOUT = |
0.1V |
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Voltage Input |
4.5 |
2.25 |
1.35 |
1.35 |
V |
or VCC − |
0.1V |
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5.5 |
2.75 |
1.65 |
1.65 |
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VOH |
Minimum HIGH Level |
3.0 |
2.99 |
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2.9 |
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2.9 |
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Voltage Output |
4.5 |
4.49 |
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4.4 |
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4.4 |
V |
IOUT = |
− |
50 µ A |
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5.5 |
5.49 |
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5.4 |
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5.4 |
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VIN = |
VIL or VIH |
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3.0 |
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2.56 |
2.46 |
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IOH = |
− |
12 mA |
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4.5 |
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3.86 |
3.76 |
V |
IOH = |
− |
24 mA |
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5.5 |
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4.86 |
4.76 |
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IOH = |
− 24 mA (Note 2) |
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VOL |
Maximum LOW Level |
3.0 |
0.002 |
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0.1 |
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0.1 |
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Voltage Output |
4.5 |
0.001 |
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0.1 |
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0.1 |
V |
IOUT = |
50 µ A |
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5.5 |
0.001 |
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0.1 |
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0.1 |
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VIN = |
VIL or VIH |
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3.0 |
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0.36 |
0.44 |
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IOL = |
12 mA |
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4.5 |
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0.36 |
0.44 |
V |
IOL = |
24 mA |
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5.5 |
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0.36 |
0.44 |
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IOL = |
24 mA (Note 2) |
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IIN (Note 4) |
Maximum Input Leakage Current |
5.5 |
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± |
0.1 |
± |
1.0 |
µ A |
VI = |
VCC, GND |
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IOZ |
Maximum 3-STATE |
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VI (OE) = VIL, VIH |
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Leakage Current |
5.5 |
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± |
0.25 |
± |
2.5 |
µ A |
VI = |
VCC, GND |
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VO = |
VCC, GND |
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IOLD |
Minimum Dynamic (Note 3) |
5.5 |
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75 |
mA |
VOLD = |
1.65V Max |
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IOHD |
Output Current |
5.5 |
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− 75 |
mA |
VOHD = |
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3.85V Min |
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ICC (Note 4) |
Maximum Quiescent Supply Current |
5.5 |
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4.0 |
40.0 |
µ A |
VIN = |
VCC or GND |
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Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
74ACT257 • 74AC257
3 |
www.fairchildsemi.com |
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