Texas Instruments UC5613Z, UC5613QPTR, UC5613QP, UC5613PWPTR, UC5613PWP Datasheet

UC5613

9-Line Low Capacitance SCSI Active Terminator

FEATURES

∙Complies with SCSI, SCSI-2 and SPI-2 Standards

∙3pF Channel Capacitance during Disconnect

∙100μA Supply Current in Disconnect Mode

∙Meets SCSI Hot Plugging Capability

∙−400mA Sourcing Current for Termination

∙+400mA Sinking Current for Active Negation

∙Logic Command Disconnects all Termination Lines

DESCRIPTION

The UC5613 provides 9 lines of active termination for a SCSI (Small Computer Systems Interface) parallel bus. The SCSI standard recommends active termination at both ends of the cable segment.

The UC5613 provides a disconnect feature which, when opened or driven high, disconnects all terminating resistors and disables the regulator greatly reducing standby power. The output channels remain high impedance even without Termpwr applied. A low channel capacitance of 3pF allows units at interim points of the bus to have little or no effect on the signal integrity.

The UC5613 is pin-for-pin compatible with its predecessor, the UC5603 - 9 line Active Terminator. The only functional difference between the UC5613 and UC5603 is the absence of the negative clamps. Parametrically, the UC5613 has a 5% tolerance on impedance and current compared to a 3% tolerance on the UC5603. Custom power packages are utilized to allow normal operation at full power (1.2 watts).

∙Trimmed Termination Current to 5% Internal circuit trimming is utilized, first to trim the impedance to a 5% toler-

∙Trimmed Impedance to 5%

∙Current Limit and Thermal Shutdown Protection

BLOCK DIAGRAM

ance; then, the output current is trimmed to a 5% tolerance. The output current trim is set as close as possible to the maximum value of the SCSI specification which maximizes the noise margin for fast SCSI operation.

Other features include thermal shutdown and current limit.

This device is offered in low thermal resistance versions of the industry standard 16 pin narrow body SOIC, 16 pin ZIP (zig-zag in line package), and 24 pin TSSOP.

UDG-94003-1

Circuit Design Patented

3/97

UC5613

ABSOLUTE MAXIMUM RATINGS

Termpwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V Signal Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +7V Regulator Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5A Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to +150°C Lead Temperature (Soldering, 10 Sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C

Unless otherwise specified all voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal.

Consult Packaging Section of Unitrode Integrated Circuits databook for thermal limitations and considerations of packages.

RECOMMENDED OPERATING CONDITIONS

Termpwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8V to 5.25V

Signal Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +5V

Disconnect Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to Termpwr

CONNECTION DIAGRAMS

DIL-16 (Top View) N or J Package

TSSOP-24 (Top View)

PWP Package

SOIC-16 (Top View)

DP Package

* PWP package pin 5 serves as signal ground; pins 6, 7, 8, 9, 17, 18, 19, and 20 serve as heatsink/ground.

ZIP-16 (Top View)

Z Package

* DP package pin 5 serves as signal ground; pins 4, 12, 13 serve as heatsink/ground.

Note: Drawings are not to scale.

2