UCC27323, UCC27324, UCC27325
UCC37323, UCC37324, UCC37325
SLUS492B – JUNE 2001 – REVISED SEPTEMBER 2002
DUAL 4 A PEAK HIGH SPEED LOW-SIDE POWER MOSFET DRIVERS
DIndustry-Standard Pin-Out
DHigh Current Drive Capability of ± 4 A at the
Miller Plateau Region
DEfficient Constant Current Sourcing Using a Unique BiPolar & CMOS Output Stage
DTTL/CMOS Compatible Inputs Independent of Supply Voltage
D20-ns Typical Rise and 15-ns Typical Fall Times with 1.8-nF Load
DTypical Propagation Delay Times of 25 ns with Input Falling and 35 ns with Input Rising
D4-V to 15-V Supply Voltage
DSupply Current of 0.3 mA
DDual Outputs Can Be Paralleled for Higher Drive Current
DAvailable in Thermally Enhanced MSOP PowerPADTM Package with 4.7° C/W θ jc
DRated From –40° C to 85° C
DSwitch Mode Power Supplies
DDC/DC Converters
DMotor Controllers
DLine Drivers
The UCC37323/4/5 family of high-speed dual MOSFET drivers can deliver large peak currents into capacitive loads.Three standard logic options are offered – dual-inverting, dual-noninverting and one-inverting and one-noninverting driver. The thermally enhanced 8-pin PowerPADTM MSOP package (DGN) drastically lowers the thermal resistance to improve long-term reliability. It is also offered in the standard SOIC-8 (D) or PDIP-8
(P) packages.
Using a design that inherently minimizes shoot-through current, these drivers deliver 4-A of current where it is needed most at the Miller plateau region during the MOSFET switching transition. A unique BiPolar and MOSFET hybrid output stage in parallel also allows efficient current sourcing and sinking at low supply voltages.
N/C 1 |
INVERTING |
8 |
N/C |
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INA 2 |
NON–INVERTING |
7 |
OUTA |
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GND 3 |
INVERTING |
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6 |
VDD |
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INB 4 |
NON–INVERTING |
5 |
OUTB |
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UDG–01063
PowerPADt is a trademark of Texas Instruments Incorporated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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PRODUCTION DATA information is current as of publication date. |
Copyright 2002, Texas Instruments Incorporated |
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Products conform to specifications per the terms of Texas Instruments |
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standard warranty. Production processing does not necessarily include |
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testing of all parameters. |
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www.ti.com |
1 |
UCC27323, UCC27324, UCC27325
UCC37323, UCC37324, UCC37325
SLUS492B – JUNE 2001 – REVISED SEPTEMBER 2002
OUTPUT |
TEMPERATURE RANGE |
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PACKAGED DEVICES |
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MSOP-8 PowerPAD |
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CONFIGURATION |
TA = TJ |
SOIC-8 (D) |
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PDIP-8 (P) |
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(DGN)} |
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Dual inverting |
–40° C to +85° C |
UCC27323D |
UCC27323DGN |
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UCC27323P |
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0° C to +70° C |
UCC37323D |
UCC37323DGN |
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UCC37323P |
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Dual nonInverting |
–40° C to +85° C |
UCC27324D |
UCC27324DGN |
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UCC27324P |
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0° C to +70° C |
UCC37324D |
UCC37324DGN |
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UCC37324P |
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One inverting, |
–40° C to +85° C |
UCC27325D |
UCC27325DGN |
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UCC27325P |
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one noninverting |
0° C to +70° C |
UCC37325D |
UCC37325DGN |
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UCC37325P |
† D (SOIC–8) and DGN (PowerPAD–MSOP) packages are available taped and reeled. Add R suffix to device type (e.g. UCC27323DR, UCC27324DGNR) to order quantities of 2,500 devices per reel for D or 1,000 devices per reel for DGN package.
‡ The PowerPAD is not directly connected to any leads of the package. However, it is electrically and thermally connected to the substrate which is the ground of the device.
D, DGN, OR P PACKAGE
(TOP VIEW)
N/A |
1 |
8 |
N/A |
INA |
2 |
7 |
OUTA |
GND |
3 |
6 |
VDD |
INB |
4 |
5 |
OUTB |
(DUAL INVERTING)
D, DGN, OR P PACKAGE |
D, DGN, OR P PACKAGE |
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N/A |
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N/A |
N/A |
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N/A |
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1 |
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1 |
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OUTA |
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OUTA |
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INA |
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7 |
INA |
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GND |
3 |
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6 |
VDD |
GND |
3 |
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VDD |
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OUTB |
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OUTB |
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INB |
4 |
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INB |
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(DUAL NONINVERTING) |
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ONE NONINVERTING) |
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Power Rating (mW) |
Derating Factor Above |
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PACKAGE |
SUFFIX |
Θ jc (° C/W) |
Θ ja (° C/W) |
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70° C (mW/ C) See |
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TA = 70° C See Note 1 |
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Note 1 |
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SOIC-8 |
D |
42 |
84 – 160} |
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344–655 See Note 2 |
6.25 – 11.9 See Note 2 |
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PDIP-8 |
P |
49 |
110 |
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500 |
9 |
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MSOP PowerPAD-8 |
DGN |
4.7 |
50 – 59} |
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1370 |
17.1 |
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See Note 3 |
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Notes: 1. 125° C operating junction temperature is used for power rating calculations |
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2.The range of values indicates the effect of pc–board. These values are intended to give the system designer an indication of the best and worst case conditions. In general, the system designer should attempt to use larger traces on the pc–board where possible in order to spread the heat away form the device more effectively. For information on the PowerPADt package, refer to Technical Brief, PowerPad Thermally Enhanced Package, Texas Instrument s Literature No. SLMA002 and Application Brief, PowerPad Made Easy, Texas Instruments Literature No. SLMA004.
3.The PowerPAD is not directly connected to any leads of the package. However, it is electrically and thermally connected to the substrate which is the ground of the device.
Table 1. Input/Output Table
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INPUTS (VIN_L, VIN_H) |
UCC37323 |
UCC37324 |
UCC37325 |
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INA |
INB |
OUTA |
OUTB |
OUTA |
OUTB |
OUTA |
OUTB |
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L |
L |
H |
H |
L |
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H |
L |
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H |
H |
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H |
H |
H |
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H |
L |
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H |
L |
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H |
H |
L |
L |
H |
H |
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H |
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2 |
www.ti.com |
UCC27323, UCC27324, UCC27325
UCC37323, UCC37324, UCC37325
SLUS492B – JUNE 2001 – REVISED SEPTEMBER 2002
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 16 V Output current (OUTA, OUTB) DC, IOUT_DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 A
Pulsed, (0.5 s), IOUT_PULSED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 A . . .
Power dissipation at TA = 25° C (DGN package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 W (D package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW
(P package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350 mW
Junction operating temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° C to 150° C Storage temperature, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° C to 150° C Lead temperature (soldering, 10 sec.), . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300° C
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡ All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal.
electrical characteristics, VDD = 4.5 V to 15 V, TA = TJ, (unless otherwise noted)
PARAMETER |
TEST CONDITION |
MIN |
TYP |
MAX |
UNITS |
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VIN_H, logic 1 input threshold |
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V |
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VIN_L, logic 0 input threshold |
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1 |
V |
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Input current |
0 V <= VIN <= VDD |
–10 |
0 |
10 |
µ A |
output (OUTA, OUTB) |
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PARAMETER |
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TEST CONDITION |
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TYP |
MAX |
UNITS |
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Output current |
VDD = 14 V, |
See Note 1, |
See Note 2 |
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4 |
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VOH, high-level output voltage |
VOH = VDD – VOUT, |
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IOUT = –10 mA |
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300 |
450 |
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VOL, low-level output level |
IOUT = 10 mA |
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22 |
40 |
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Output resistance high |
TA = 25° C, |
IOUT = –10 mA, |
VDD = 14 V, |
25 |
30 |
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Ω |
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See Note 3 |
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TA = full range, |
IOUT = –10 mA, |
VDD = 14 V, |
18 |
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Ω |
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See Note 3 |
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Output resistance low |
TA = 25° C, |
IOUT = 10 mA, |
VDD = 14 V, |
1.9 |
2.2 |
2.5 |
Ω |
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See Note 3 |
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TA = full range |
IOUT = 10 mA, |
VDD = 14 V, |
1.2 |
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4.0 |
Ω |
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See Note 3 |
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Latch-up protection |
See Note 1 |
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500 |
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mA |
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NOTES: 1. Ensured by design. Not tested in production.
2.The pullup / pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The pulsed output current rating is the combined current from the bipolar and MOSFET transistors.
3.The pullup / pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The output resistance is the RDS(ON) of the MOSFET transistor when the voltage on the driver output is less than the saturation voltage of the bipolar transistor.
www.ti.com |
3 |
UCC27323, UCC27324, UCC27325
UCC37323, UCC37324, UCC37325
SLUS492B – JUNE 2001 – REVISED SEPTEMBER 2002
electrical characteristics, VDD = 4.5 V to 15 V, TA = TJ, (unless otherwise noted)
PARAMETER |
TEST CONDITION |
MIN |
TYP |
MAX |
UNITS |
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tR, rise time (OUTA, OUTB) |
CLOAD = 1.8 nF, |
See Figure 1 |
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40 |
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tF, fall time (OUTA, OUTB) |
CLOAD = 1.8 nF, |
See Figure 1 |
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tD1, delay, IN rising (IN to OUT) |
CLOAD = 1.8 nF, |
See Figure 1 |
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40 |
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tD2, delay, IN falling (IN to OUT) |
CLOAD = 1.8 nF, |
See Figure 1 |
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PARAMETER |
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TEST CONDITION |
MIN |
TYP |
MAX |
UNITS |
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INA = 0 V, |
INB = 0 V |
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450 |
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UCCx7323 |
INA = 0 V, |
INB = HIGH |
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450 |
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INA = HIGH, |
INB = 0 V |
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INA = HIGH, |
INB = HIGH |
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INA = 0 V, |
INB = 0 V |
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IDD, static operating current |
UCCx7324 |
INA = 0 V, |
INB = HIGH |
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INA = HIGH, |
INB = 0 V |
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INA = HIGH, |
INB = HIGH |
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INA = 0 V, |
INB = 0 V |
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UCCx7325 |
INA = 0 V, |
INB = HIGH |
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INA = HIGH, |
INB = 0 V |
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INA = HIGH, |
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NOTES: 1. Ensured by design. Not production.
2.The pullup / pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The peak output current rating is the combined current from the bipolar and MOSFET transistors.
3.The pullup / pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The output resistance is the RDS(ON) of the MOSFET transistor when the voltage on the driver output is less than the saturation voltage of the bipolar transistor.
(a) |
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INPUT |
INPUT |
10% |
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10% |
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0V |
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D1 |
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tD1 |
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OUTPUT |
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OUTPUT |
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Figure 1. Switching Waveforms for (a) Inverting Driver and (b) Noninverting Driver
4 |
www.ti.com |
UCC27323, UCC27324, UCC27325
UCC37323, UCC37324, UCC37325
SLUS492B – JUNE 2001 – REVISED SEPTEMBER 2002
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Terminal Functions |
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TERMINAL |
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FUNCTION |
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NO. |
NAME |
I/O |
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1 |
N/C |
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No connection. Should be grounded. |
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2 |
INA |
I |
Input A. Input signal of the A driver which has logic compatible threshold and hysteresis. |
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If not used, this input should be tied to either VDD or GND. It should not be left floating. |
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3 |
GND |
– |
Common ground. This ground should be connected very closely to the source of the |
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power MOSFET which the driver is driving. |
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4 |
INB |
I |
Input B. Input signal of the A driver which has logic compatible threshold and hysteresis. |
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If not used, this input should be tied to either VDD or GND. It should not be left floating. |
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5 |
OUTB |
O |
Driver output B. The output stage is capable of providing 4-A drive current to the gate of |
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a power MOSFET. |
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6 |
VDD |
I |
Supply. Supply voltage and the power input connection for this device. |
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7 |
OUTA |
O |
Driver output A. The output stage is capable of providing 4-A drive current to the gate of |
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a power MOSFET. |
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N/C |
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No Connection. Should be grounded. |
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High frequency power supplies often require high-speed, high-current drivers such as the UCC37323/4/5 family. A leading application is the need to provide a high power buffer stage between the PWM output of the control IC and the gates of the primary power MOSFET or IGBT switching devices. In other cases, the driver IC is utilized to drive the power device gates through a drive transformer. Synchronous rectification supplies also have the need to simultaneously drive multiple devices which can present an extremely large load to the control circuitry.
Driver ICs are utilized when it is not feasible to have the primary PWM regulator IC directly drive the switching devices for one or more reasons. The PWM IC may not have the brute drive capability required for the intended switching MOSFET, limiting the switching performance in the application. In other cases there may be a desire to minimize the effect of high frequency switching noise by placing the high current driver physically close to the load. Also, newer ICs that target the highest operating frequencies may not incorporate onboard gate drivers at all. Their PWM outputs are only intended to drive the high impedance input to a driver such as the UCC37323/4/5. Finally, the control IC may be under thermal stress due to power dissipation, and an external driver can help by moving the heat from the controller to an external package.
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