UC1856 UC2856 UC3856
Improved Current Mode PWM Controller
FEATURES |
DESCRIPTION |
•Pin-for-Pin Compatible With the UC3846 The UC3856 is a high performance version of the popular UC3846
•65ns Typical Delay From Shutdown to Outputs, and 50ns Typical Delay From Sync to Outputs
•Improved Current Sense Amplifier With Reduced Noise Sensitivity
•Differential Current Sense with 3V Common Mode Range
•Trimmed Oscillator Discharge Current for Accurate Deadband Control
•Accurate 1V Shutdown Threshold
•High Current Dual Totem Pole Outputs (1.5A peak)
•TTL Compatible Oscillator SYNC Pin Thresholds
•4kV ESD Protection
series of current mode controllers, and is intended for both design upgrades and new applications where speed and accuracy are important. All input to output delays have been minimized, and the current sense output is slew rate limited to reduce noise sensitivity. Fast 1.5A peak output stages have been added to allow rapid switching of power FETs.
A low impedance TTL compatible sync output has been implemented with a tri-state function when used as a sync input.
Internal chip grounding has been improved to minimize internal “noise” caused when driving large capacitive loads. This, in conjunction with the improved differential current sense amplifier results in enhanced noise immunity.
Other features include a trimmed oscillator current (8%) for accurate frequency and dead time control; a 1V, 5% shutdown threshold; and 4kV minimum ESD protection on all pins.
BLOCK DIAGRAM
UDG-96176
9/96
ABSOLUTE MAXIMUM RATINGS
Supply Voltage .................................................................... |
+40V |
Collector Supply Voltage ..................................................... |
+40V |
Output Current, Source or Sink |
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DC................................................................................... |
0.5A |
Pulse (0.5μs)................................................................... |
2.0A |
Error Amp Inputs.................................................... |
−0.3V to +VIN |
Shutdown Input..................................................... |
−0.3V to +10V |
Current Sense Inputs.............................................. |
−0.3V to +3V |
SYNC Output Current ...................................................... |
±10mA |
Error Amplifier Output Current ........................................... |
−5mA |
Soft Start Sink Current....................................................... |
50mA |
Oscillator Charging Current ................................................. |
5mA |
Power Dissipation at TA = 25°C (Note 2)....................... |
1000mW |
Power Dissipation at TC = 25°C (Note 2) ...................... |
2000mW |
Junction Temperature ....................................... |
−55°C to +150°C |
Storage Temperature Range ............................ |
−65°C to +150°C |
Lead Temperature (Soldering, 10 sec.) ........................... |
+300°C |
All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Consult packaging section of databook for thermal limitations and considerations of package.
UC1856
UC2856
UC3856
CONNECTION DIAGRAMS
DIL–16, SOIC-16 (Top View)
J or N, DW PACKAGE
PLCC-28 (Top View)
QP PACKAGE
PLCC-20 (Top View)
Q PACKAGE
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = −55°C to +125°C for UC1856; − 40°C to +85°C for the UC2856; and 0°C to +70°C for the UC3856, VIN = 15V, RT = 10k, CT = 1nF, TA = TJ.
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UC1856/UC2856 |
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UC3856 |
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PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
MIN |
TYP |
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MAX |
UNITS |
Reference Section |
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Output Voltage |
TJ = 25°C, Io = 1mA |
5.05 |
5.10 |
5.15 |
5.00 |
5.10 |
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5.20 |
V |
Line Regulation |
VIN = 8V to 40V |
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20 |
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20 |
mV |
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Load Regulation |
Io = −1mA to −10mA |
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15 |
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15 |
mV |
Total Output Variation |
Line, Load, and Temperature |
5.00 |
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5.20 |
4.95 |
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5.25 |
V |
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Output Noise Voltage |
10Hz < f < 10kHz, TJ = 25°C |
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50 |
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50 |
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μV |
Long Term Stability |
TJ = 125°C, 1000 Hrs (Note 2) |
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5 |
25 |
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5 |
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25 |
mV |
Short Circuit Current |
VREF = 0V |
−25 |
−45 |
−65 |
−25 |
−45 |
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−65 |
mA |
Oscillator Section |
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Initial Accuracy |
TJ = 25°C |
180 |
200 |
220 |
180 |
200 |
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220 |
kHz |
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Over Operating Range |
170 |
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230 |
170 |
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230 |
kHz |
2
UC1856
UC2856
UC3856
ELECTRICAL CHARACTERISTICS (cont.) Unless otherwise stated, these specifications apply for TA = −55°C to +125°C for UC1856; − 40°C to +85°C for the UC2856; and 0°C to +70°C for the UC3856, VIN = 15V, RT = 10k, CT = 1nF, TA = TJ.
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UC1856/UC2856 |
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UC3856 |
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PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
MIN |
TYP |
MAX |
UNITS |
Oscillator Section (cont.) |
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Voltage Stability |
VIN = 8V to 40V |
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2 |
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2 |
% |
Discharge Current |
TJ = 25°C, V CT = 2V |
7.5 |
8.0 |
8.8 |
7.5 |
8.0 |
8.8 |
mA |
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VCT = 2V |
6.7 |
8.0 |
8.8 |
6.7 |
8.0 |
8.8 |
mA |
Sync Output High Level |
Io = −1mA |
2.4 |
3.6 |
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2.4 |
3.6 |
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V |
Sync Output Low Level |
Io = +1mA |
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0.2 |
0.4 |
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0.2 |
0.4 |
V |
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Sync Input High Level |
CT = 0V, RT = VREF |
2.0 |
1.5 |
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2.0 |
1.5 |
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V |
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Sync Input Low Level |
CT = 0V, RT = VREF |
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1.5 |
0.8 |
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1.5 |
0.8 |
V |
Sync Input Current |
CT = 0V, RT = VREF |
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1 |
10 |
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1 |
10 |
μA |
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VSYNC = 5V |
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Sync Delay to Outputs |
CT = 0V, RT = VREF |
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50 |
100 |
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50 |
100 |
ns |
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VSYNC = 0.8V to 2V |
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Error Amplifier Section |
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Input Offset Voltage |
VCM = 2V |
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5 |
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10 |
mV |
Input Bias Current |
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−1 |
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−1 |
μA |
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Input Offset Current |
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500 |
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500 |
nA |
Common Mode Range |
VIN = 8V to 40V |
0 |
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VIN − 2 |
0 |
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VIN − 2 |
V |
Open Loop Gain |
Vo = 1.2V to 3V |
80 |
100 |
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80 |
100 |
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dB |
Unity Gain Bandwidth |
TJ = 25°C |
1 |
1.5 |
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1 |
1.5 |
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MHz |
CMRR |
VCM = 0V to 38V, VIN = 40V |
75 |
100 |
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75 |
100 |
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dB |
PSRR |
VIN = 8V to 40V |
80 |
100 |
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80 |
100 |
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dB |
Output Sink Current |
VID = −15mV, VcOMP = 1.2V |
5 |
10 |
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5 |
10 |
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mA |
Output Source Current |
VID = 15mV, VCOMP = 2.5V |
−0.4 |
−0.5 |
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−0.4 |
−0.5 |
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mA |
Output High Level |
VID = 50mV, RL (COMP) = 15k |
4.3 |
4.6 |
4.9 |
4.3 |
4.6 |
4.9 |
V |
Output Low Level |
VID = −50mV, RL (COMP) = 15k |
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0.7 |
1 |
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0.7 |
1 |
V |
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Current Sense Amplifier Section |
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Amplifier Gain |
VCS− = 0V, CL SS Open (Notes 3,4) |
2.5 |
2.75 |
3.0 |
2.5 |
2.75 |
3.0 |
V/V |
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Maximum Differential |
CL SS Open (Note 3) |
1.1 |
1.2 |
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1.1 |
1.2 |
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V |
Input Signal (VCS+ − Vcs-) |
RL (COMP) = 15k |
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Input Offset Voltage |
VCL SS = 0.5V |
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5 |
35 |
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5 |
35 |
mV |
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COMP Open (Note 3) |
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CMRR |
VCM = 0V to 3V |
60 |
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60 |
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dB |
PSRR |
VIN = 8V to 40V |
60 |
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60 |
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dB |
Input Bias Current |
VCL SS = 0.5V, COMP Open (Note 3) |
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−1 |
−3 |
−1 |
−3 |
μA |
Input Offset Current |
VCL SS = 0.5V, COMP Open (Note 3) |
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1 |
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1 |
mA |
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Input Common Mode Range |
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0 |
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3 |
0 |
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3 |
V |
Delay to Outputs |
VEA+ = VREF, EA− = 0V |
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120 |
250 |
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120 |
250 |
ns |
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CS+ − CS− = 0V to 1.5V |
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Current Limit Adjust Section |
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Current Limit Offset |
VCS- = 0V |
0.43 |
0.5 |
0.57 |
0.43 |
0.5 |
0.57 |
V |
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VCS+ = 0V, COMP = Open (Note 3) |
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Input Bias Current |
VEA+ = VREF, VEA− = 0V |
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−10 |
−30 |
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−10 |
−30 |
μA |
Shutdown Terminal Section |
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Threshold Voltage |
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0.95 |
1.00 |
1.05 |
0.95 |
1.00 |
1.05 |
V |
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Input Voltage Range |
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0 |
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5 |
0 |
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5 |
V |
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3
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