TEXAS INSTRUMENTS UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44 Technical data

UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44, UCC28C45 UCC38C40, UCC38C41, UCC38C42, UCC38C43, UCC38C44, UCC38C45

SLUS458D − AUGUST 2001 − REVISED JANUARY 2007

BiCMOS LOW POWER CURRENT MODE PWM CONTROLLER

FEATURES

DESCRIPTION

DEnhanced Replacement for UC3842A Family With Pin-to-Pin Compatibility

D1-MHz Operation

D50- A Standby Current, 100- A Maximum

DLow Operating Current of 2.3 mA at 52 kHz

DFast 35-ns Cycle-by-Cycle Overcurrent Limiting

D±1-A Peak Output Current

DRail-to-Rail Output Swings with 25-ns Rise and 20-ns Fall Times

D±1% Initial Trimmed 2.5-V Error Amplifier

Reference

DTrimmed Oscillator Discharge Current

DNew Under Voltage Lockout Versions

DMSOP-8 Package Minimizes Board Space

APPLICATIONS

DSwitch-Mode Power Supplies

Ddc-to-dc Converters

DBoard Mount Power Modules

FUNCTIONAL BLOCK DIAGRAM

UCC38C4x family is a high-performance currentmode PWM controller. It is an enhanced BiCMOS version with pin-for-pin compatibility to the industry standard UC384xA family and UC384x family of PWM controllers. In addition, lower startup voltage versions of 7 V are offered as UCC38C40 and UCC38C41.

Providing necessary features to control fixed frequency, peak current-mode power supplies, this family offers the following performance advantages. The device offers high-frequency operation up to 1 MHz with low start-up and operating currents, thus minimizing start-up loss and low operating power consumption for improved efficiency. The device also features a very fast current-sense-to-output delay time of 35 ns and a ±1 A peak output current capability with improved rise and fall times for driving large external MOSFETs directly.

The UCC38C4x family is offered in 8-pin packages, MSOP (DGK), SOIC (D) and PDIP (P).

	5.0 V
VREF 8	VREF	7	VDD
		UVLO
		+
		+
		5	GND
		VREF
		GOOD LOGIC

RT/CT	4		OSC
					(NOTE)
	2.5 V		ERROR AMP		T	6	OUT
				2R
		+
FB	2				S	Q
				R	1V
COMP	1				R	Q
CS	3

Note: Toggle flip−flop used only in UCC38C41, UCC38C44, and UCC38C45.

UDG−99139

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.	Copyright 2003, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

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1

UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44, UCC28C45 UCC38C40, UCC38C41, UCC38C42, UCC38C43, UCC38C44, UCC38C45

SLUS458D − AUGUST 2001 − REVISED JANUARY 2007

recommended operating conditions

		MIN	MAX	UNIT
Input voltage, VDD			18	V
Output voltage range, VOUT			18	V
Average output current, IOUTW			200	mA
Reference output current, IOUT(ref)W			−20	mA
Operating junction temperature, T	W	−55	150	°C
	J

¶ It is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time.

absolute maximum ratings over operating free-air temperature (unless otherwise noted)}w

Supply voltage (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V (MAX ICC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA

Output current, IOUT peak . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 A Output energy, capacitive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 J

Voltage rating (COMP, CS, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6.3 V (OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 20 V (RT/CT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6.3 V (VREF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V

Error amplifier output sink current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA

Total Power Dissipation at TA = 25°C: D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 °C/W DGK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W

P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C/W

Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55 °C to 150°C Storage temperature range Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 °C to 150°C Lead Temperature (Soldering, 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C

‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

§All voltages are with respect to ground. Currents are positive into and negative out of the specified terminals. Consult the Packaging Section of the Databook for thermal limitations and considerations of the package.

AVAILABLE OPTIONS

		MAXIMUM	UVLO	SOIC−8	PDIP−8	MSOP−8
	TA			SMALL OUTLINE	PLASTIC DIP	SMALL OUTLINE
		DUTY CYCLE	ON/OFF
				(D){	(P)	(DGK){
			14.5V / 9.0V	UCC28C42D	UCC28C42P	UCC28C42DGK
		100%	8.4V / 7.6V	UCC28C43D	UCC28C43P	UCC28C43DGK
	−40 °C to 105°C		7.0V / 6.6V	UCC28C40D	UCC28C40P	UCC28C40DGK
			14.5V / 9.0V	UCC28C44D	UCC28C44P	UCC28C44DGK
		50%	8.4V / 7.6V	UCC28C45D	UCC28C45P	UCC28C45DGK
			7.0V / 6.6V	UCC28C41D	UCC28C41P	UCC28C41DGK
			14.5V / 9.0V	UCC38C42D	UCC38C42P	UCC38C42DGK
		100%	8.4V / 7.6V	UCC38C43D	UCC38C43P	UCC38C43DGK
	0°C to 70°C		7.0V / 6.6V	UCC38C40D	UCC38C40P	UCC38C40DGK
			14.5V / 9.0V	UCC38C44D	UCC38C44P	UCC38C44DGK
		50%	8.4V / 7.6V	UCC38C45D	UCC38C45P	UCC38C45DGK
			7.0V / 6.6V	UCC38C41D	UCC38C41P	UCC38C41DGK

†D (SOIC−8) and DGK (MSOP−8) packages are available taped and reeled. Add R suffix to device type (e.g. UCC28C42DR) to order quantities of 2500 devices per reel. Tube quantities are 75 for D packages (SOIC−8) and 80 for DGK package (MSOP−8), and 50 for P package (PDIP-8).

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UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44, UCC28C45 UCC38C40, UCC38C41, UCC38C42, UCC38C43, UCC38C44, UCC38C45

SLUS458D − AUGUST 2001 − REVISED JANUARY 2007

electrical characteristics VDD = 15 V (See Note 1), RT = 10 kΩ, CT = 3.3 nF, CVDD = 0.1µF and no load on the outputs, TA = −40 °C to 105°C for the UCC28C4x and TA = 0°C to 70°C for the UCC38C4x,

TA = TJ (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Reference Section

Output voltage, initial accuracy

TA = 25°C

IOUT = 1mA

4.9

5.0

5.1

V

Line regulation

VDD = 12 V to 18 V

0.2

20

mV

Load regulation

1mA to 20mA

3

25

mV

Temperature stability

See Note 2

0.2

0.4

mV/°C

Total output variation

See Note 2

4.82

5.18

V

Output noise voltage

10 Hz to 10 kHz,

TA = 25°C,

See Note 2

50

µV

Long term stability

1000 hours,

TA = 125°C,

See Note 2

5

25

mV

Output short circuit

–30

–45

–55

mA

Oscillator Section

Initial accuracy

TA = 25°C,

See Note 3

50.5

53

55

kHz

Voltage stability

VDD = 12 V to 18 V

0.2%

1.0%

Temperature stability

TMIN to TMAX,

See Note 2

1%

2.5%

Amplitude

RT/CT Pin peak-to-peak

1.9

V

Discharge current

TA = 25°C,

RT/CT = 2 V,

See Note 4

7.7

8.4

9.0

mA

RT/CT = 2 V,

See Note 4

7.2

8.4

9.5

mA

Error Amplifier Section

Feedback input voltage, initial accuracy

VCOMP = 2.5 V,

TA = 25°C

2.475

2.500

2.525

V

Feedback input voltage, total variation

VCOMP = 2.5 V,

2.45

2.50

2.55

V

Input bias current

VFB = 5.0 V

–0.1

–2.0

µA

Open-loop voltage gain (AVOL)

VOUT = 2 V to 4 V

65

90

dB

Unity gain bandwidth

See Note 2

1.0

1.5

MHz

Power supply rejection ratio (PSRR)

VDD = 12 V to 18 V

60

dB

Output sink current

VFB = 2.7 V,

VCOMP = 1.1 V

2

14

mA

Output source current

VFB = 2.3 V,

VCOMP = 5V

–0.5

–1.0

mA

High-level output voltage (VOH)

VFB = 2.7 V,

RLOAD = 15 k to GND

5

6.8

V

Low-level output voltage (VOL)

VFB = 2.7 V,

RLOAD = 15 k to VREF

0.1

1.1

V

Current Sense Section

Gain

See Note 5, 6

2.85

3.00

3.15

V/V

Maximum input signal

VFB < 2.4 V

0.9

1.0

1.1

V

Power supply rejection ratio (PSRR)

VDD = 12 V to 18 V, See Note 2, 5

70

dB

Input bias current

–0.1

–2.0

µA

CS to output delay

35

70

ns

COMP to CS offset

VCS = 0 V

1.15

V

NOTE: 1. Adjust VDD above the start threshold before setting at 15 V.

NOTE: 2. Ensured by design. Not production tested.

NOTE: 3. Output frequencies of the UCC38C41, UCC38C44 and the UCC38C45 are half the oscillator frequency.

NOTE: 4. Oscillator discharge current is measured with RT = 10 kΩ to VREF.

NOTE:

5.

Parameter measured at trip point of latch with VFB =

0 V.

NOTE:

6.

Gain is defined as ACS +

DVCOM

, 0V ¬ V

CS

¬ 900mV

DV

CS

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UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44, UCC28C45 UCC38C40, UCC38C41, UCC38C42, UCC38C43, UCC38C44, UCC38C45

SLUS458D − AUGUST 2001 − REVISED JANUARY 2007

electrical characteristics VDD = 15 V (See Note 1), RT = 10 kΩ, CT = 3.3 nF, CVDD = 0.1µF and no load on the outputs, TA = −40 °C to 105°C for the UCC28C4x and TA = 0°C to 70°C for the UCC38C4x,

TA = TJ (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNITS
Output Section
VOUT low (RDS(on) pull-down)	ISINK = 200 mA			5.5	15	Ω
VOUThigh (RDS(on) pull-up)	ISOURCE = 200 mA			10	25
Rise tIme	TA = 25°C,	CLOAD = 1 nF		25	50	ns
Fall time	TA = 25°C,	CLOAD = 1 nF		20	40
Undervoltage Lockout Section
	UCC38C42, UCC38C44		13.5	14.5	15.5
Start threshold	UCC38C43, UCC38C45		7.8	8.4	9.0
	UCC38C40, UCC38C41		6.5	7.0	7.5	V
	UCC38C42, UCC38C44		8	9	10
Minimum operating voltage	UCC38C43, UCC38C45		7.0	7.6	8.2
	UCC38C40, UCC38C41		6.1	6.6	7.1
PWM Section
Maximum duty cycle	UCC38C42, UCC38C43, UCC38C40, VFB < 2.4 V		94%	96%
	UCC38C44, UCC38C45, UCC38C41, VFB < 2.4 V		47%	48%
Minimum duty cycle	VFB > 2.6 V				0%
Current Supply Section
Start-up current (ISTART-UP)	VDD = Undervoltage lockout start threshold (−0.5 V)			50	100	µA
Operating supply current (IDD)	VFB = VCS = 0 V			2.3	3.0	mA

NOTE 1: Adjust VDD above the start threshold before setting at 15 V.

PDIP (P) or SOIC (D) PACKAGE (TOP VIEW)

COMP			1	8		VREF
FB			2	7		VDD
CS			3	6		OUT
RT/CT			4	5		GND

MSOP (DGK) PACKAGE

(TOP VIEW)

COMP			1		8				VREF
FB			2		7				VDD
CS			3		6				OUT
RT/CT				4	5				GND

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UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44, UCC28C45 UCC38C40, UCC38C41, UCC38C42, UCC38C43, UCC38C44, UCC38C45

SLUS458D − AUGUST 2001 − REVISED JANUARY 2007

pin assignments

COMP: This pin provides the output of the error amplifier for compensation. In addition, the COMP pin is frequently used as a control port by utilizing a secondary-side error amplifier to send an error signal across the secondary-primary isolation boundary through an opto-isolator.

CS: The current sense pin is the non-inverting input to the PWM comparator. This is compared to a signal proportional to the error amplifier output voltage. A voltage ramp can be applied to this pin to run the device with a voltage mode control configuration.

FB: This pin is the inverting input to the error amplifier. The non-inverting input to the error amplifier is internally trimmed to 2.5 V ±1%.

GND: Ground return pin for the output driver stage and the logic level controller section.

OUT: The output of the on-chip drive stage. OUT is intended to directly drive a MOSFET. The OUT pin in the UCC38C40, UCC38C42 and UCC38C43 is the same frequency as the oscillator, and can operate near 100% duty cycle. In the UCC38C41, UCC38C44 and the UCC38C45, the frequency of OUT is one-half that of the oscillator due to an internal T flipflop. This limits the maximum duty cycle to < 50%.

RT/CT: Timing resistor and timing capacitor. The timing capacitor should be connected to the device ground using minimal trace length.

VDD: Power supply pin for the device. This pin should be bypassed with a 0.1- F capacitor with minimal trace lengths. Additional capacitance may be needed to provide hold up power to the device during startup.

VREF: 5-V reference. For stability, the reference should be bypassed with a 0.1- F capacitor to ground using the minimal trace length possible.

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UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44, UCC28C45 UCC38C40, UCC38C41, UCC38C42, UCC38C43, UCC38C44, UCC38C45

SLUS458D − AUGUST 2001 − REVISED JANUARY 2007

APPLICATION INFORMATION

This device is a pin-for-pin replacement of the bipolar UC3842 family of controllers, the industry standard PWM controller for single-ended converters. Familiarity with this controller family is assumed.

The UCC28C4x/UCC38C4x series is an enhanced replacement with pin-to-pin compatibility to the bipolar UC284x/UC384x and UC284xA/UC384xA families. The new series offers improved performance when compared to older bipolar devices and other competitive BiCMOS devices with similar functionality. Note that these improvements discussed below generally consist of tighter specification limits that are a subset of the older product ratings, maintaining drop-in capability. In new designs these improvements can be utilized to reduce the component count or enhance circuit performance when compared to the previously available devices.

advantages

This device increases the total circuit efficiency whether operating off-line or in dc input circuits. In off-line applications the low start-up current of this device reduces steady state power dissipation in the startup resistor, and the low operating current maximizes efficiency while running. The low running current also provides an efficiency boost in battery operated supplies.

low voltage operation

Two members of the UCC38C4x family are intended for applications that require a lower start-up voltage than the original family members. The UCC38C40 and UCC38C41 have a turn-on voltage of 7.0 V typical and exhibit hysteresis of 0.4 V for a turn-off voltage of 6.6 V. This reduced start-up voltage enables use in systems with lower voltages, such as 12-V battery systems which are nearly discharged.

high speed operation

The BiCMOS design allows operation at high frequencies that were not feasible in the predecessor bipolar devices. First, the output stage has been redesigned to drive the external power switch in approximately half the time of the earlier devices. Second, the internal oscillator is more robust with less variation as frequency increases. In addition, the current sense to output delay has been reduced by a factor of three, to 45ns typical. These features combine to provide a device capable of reliable high frequency operation.

The UCC38C4x family oscillator is true to the curves of the original bipolar devices at lower frequencies yet extends the frequency programmability range to at least 1MHz. This allows the device to offer pin to pin capability where required yet capable of extending the operational range to the higher frequencies typical of latest applications. When the original UC3842 was released in 1984 most switching supplies operated between 20kHz and 100kHz. Today, the UCC38C4x can be used in designs cover a span roughly ten times higher than those numbers.

start/run current improvements

The start−up current is only 60 A typical, a significant reduction from the bipolar device’s ratings of 300uA (UC384xA). For operation over the temperature range of −40 to 85 °C the UCC28C4x devices offer a maximum startup current of 100 A, an improvement over competitive BiCMOS devices. This allows the power supply designer to further optimize the selection of the startup resistor value to provide a more efficient design. In applications where low component cost overrides maximum efficiency the low run current of 2.3 mA, typical, may allow the control device to run directly through the single resistor to (+) rail, rather than needing a bootstrap winding on the power transformer, along with a rectifier. The start/run resistor for this case must also pass enough current to allow driving the primary switching MOSFET, which may be a few milliamps in small devices.

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UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44, UCC28C45 UCC38C40, UCC38C41, UCC38C42, UCC38C43, UCC38C44, UCC38C45

SLUS458D − AUGUST 2001 − REVISED JANUARY 2007

APPLICATION INFORMATION

± 1% initial reference voltage

The BiCMOS internal reference of 2.5 V has an enhanced design and utilizes production trim to allow initial accuracy of ±1% at room temperature and ± 2% over the full temperature range. This can be used to eliminate an external reference in applications that do not require the extreme accuracy afforded by the additional device. This is very useful for nonisolated dc-to-dc applications where the control device is referenced to the same common as the output. It is also applicable in offline designs that regulate on the primary side of the isolation boundary by looking at a primary bias winding, or perhaps from a winding on the output inductor of a buck-derived circuit.

reduced discharge current variation

The original UC3842 oscillator did not have trimmed discharged current, and the parameter was not specified on the datasheet. Since many customers attempted to use the discharge current to set a crude deadtime limit the UC3842A family was released with a trimmed discharge current specified at 25°C. The UCC28C4x/UCC38C4x series now offers even tighter control of this parameter, with approximately ±3% accuracy at 25°C, and less than 10% variation over temperature using the UCC28C4x devices. This level of accuracy can enable a meaningful limit to be programmed, a feature not currently seen in competitive BiCMOS devices. The improved oscillator and reference also contribute to decreased variation in the peak to peak variation in the oscillator waveform, which is often used as the basis for slope compensation for the complete power system.

soft-start

The following diagram provides a typical soft-start circuit for use with the UCC38C42. The values of R and C should be selected to bring the COMP pin up at a controlled rate, limiting the peak current supplied by the power stage. After the soft-start interval is complete the capacitor continues to charge to VREF, effectively removing the PNP transistor from circuit considerations.

The optional diode in parallel with the resistor forces a soft-start each time the PWM goes through UVLO and the reference (VREF) goes low. Without the diode,the capacitor otherwise remains charged during a brief loss of supply or brown-out, and no soft-start is enabled upon reapplication of VIN.

VREF	8
UCC38C42
COMP	1
GND
5

Figure 1

UDG−01072

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7

UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44, UCC28C45 UCC38C40, UCC38C41, UCC38C42, UCC38C43, UCC38C44, UCC38C45

SLUS458D − AUGUST 2001 − REVISED JANUARY 2007

APPLICATION INFORMATION

oscillator synchronization

The UCC38C4x oscillator has the same synchronization characteristics as the original bipolar devices. Thus, the information in the Application Note U−100A , UC3842/3/4/5 Provides Low-Cost Current-Mode Control, (TI Literature No. SLUA143) still applies. The application note describes how a small resistor from the timing capacitor-to-ground can offer an insertion point for synchronization to an external clock, (see Figures 2 and 3). Figure 2 shows how the UCC38C42 can be synchronized to an external clock source. This allows precise control of frequency and dead time with a digital pulse train.

	8	VREF
	RT
SYNCHRONIZATION	4	RT / CT
CIRCUIT INPUT

CT

UCC38C42 PWM

24 W

UDG−01069

Figure 2. Oscillator Synchronization Circuit

CLOCK

LOW

INPUT

	PWM	ON .
	OUT

UPPER THRESHOLD

HIGH

LOW

LOWER THRESHOLD

OUTPUT A

OFF .

ON .

VCT	(ANALOG)
			UPPER THRESHOLD

VCT

LOWER THRESHOLD

VSYNC	(DIGITAL)
	COMBINED

UDG−01070

Figure 3. Synchronization to an External Clock

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UCC28C40, UCC28C41, UCC28C42, UCC28C43, UCC28C44, UCC28C45 UCC38C40, UCC38C41, UCC38C42, UCC38C43, UCC38C44, UCC38C45

SLUS458D − AUGUST 2001 − REVISED JANUARY 2007

APPLICATION INFORMATION

precautions

The absolute maximum supply voltage is 20 V, including any transients that may be present. If this voltage is exceeded, device damage is likely. This is in contrast to the predecessor bipolar devices, which could survive up to 30 V. Thus, the supply pin should be decoupled as close to the ground pin as possible. Also, since no clamp is included in the device, the supply pin should be protected from external sources which could exceed the 20 V level.

Careful layout of the printed board has always been a necessity for high frequency power supplies. As the device switching speeds and operating frequencies increase the layout of the converter becomes increasingly important.

This 8-pin device has only a single ground for the logic and power connections. This forces the gate drive current pulses to flow through the same ground that the control circuit uses for reference. Thus, the interconnect inductance should be minimized as much as possible. One implication is to place the device (gate driver) circuitry close to the MOSFET it is driving. Note that this can conflict with the need for the error amplifier and the feedback path to be away from the noise generating components.

circuit applications

Figure 4 shows a typical off-line application.

F1
AC INPUT		+
100 Vac − 240 Vac		BR1
EMI FILTER
REQUIRED				C1A	C18
RT1
	R6	UCC38C44
IC2	1	COMP	REF	8
	2	FB	VCC	7
	3	CS	OUT	6
	4	RT/CT	GND	5

	D50
				12 V
	T1			OUT
	R10	C52		C55
C12	C3		R56
		L50
R11	D2
	D51
				5 V
	R12			OUT
		C53	C54
	D6		R55
	C5
				SEC
				COMMON
			R50
	R16
	Q1
		IC2
	C13	C50	R52	R53
		R50	C51
	K
	IC3
	A	R	R54
				UDG−0107 1

Figure 4. Typical Off-Line Application

Figure 5 shows the forward converter with synchronous rectification. This application provides 48 V to 3.3 V at 10 A with over 85% efficiency and uses the UCC38C42 as the secondary-side controller and UCC3961 as the primary-side startup control device.

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