Texas Instruments UCC35701QTR, UCC35701Q, UCC35701PWTR, UCC35701PW, UCC35701N Datasheet
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UCC15701/2
UCC25701/2
UCC35701/2
Advanced Voltage Mode Pulse Width Modulator
FEATURES
•700kHz Operation
•Integrated Oscillator/ Voltage Feed Forward Compensation
•Accurate Duty Cycle Limit
•Accurate Volt-second Clamp
•Optocoupler Interface
•Fault Counting Shutdown
•Fault Latch off or Automatic Shutdown
•Soft Stop Optimized for Synchronous Rectification
•1A Peak Gate Drive Output
•130 A Start-up Current
•750 A Operating Current
DESCRIPTION
The UCC35701/UCC35702 family of pulse width modulators is intended for isolated switching power supplies using primary side control. They can be used for both off-line applications and DC/DC converter designs such as in a distributed power system architecture or as a telecom power source.
The devices feature low startup current, allowing for efficient off-line starting, yet have sufficient output drive to switch power MOSFETs in excess of 500kHz.
Voltage feed forward compensation is operational over a 5:1 input range and provides fast and accurate response to input voltage changes over a 4:1 range. An accurate volt-second clamp and maximum duty cycle limit are also featured.
Fault protection is provided by pulse by pulse current limiting as well as the ability to latch off after a programmable number of repetitive faults has occurred.
Two UVLO options are offered. UCC35701 family has turn-on and turn-off thresholds of 13V/9V and UCC35702 family has thresholds of 9.6V/8.8V.
The UCC35701/2 and the UCC25701/2 are offered in the 14 pin SOIC (D), 14 pin PDIP (N) or in 14 pin TSSOP (PW) packages. The UCC15701/2 is offered in the 14 pin CDIP (J) package.
TYPICAL APPLICATION DIAGRAM
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VIN SUPPLY |
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R1 |
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R6 |
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R2 |
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VFF |
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R7 |
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6 |
VDD |
3 |
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R3 |
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7 |
RT |
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VREF |
CT |
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UCC35701 |
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C6 VOUT |
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10 |
CT |
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C4 |
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R4 |
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C1 |
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9 |
VSCLAMP |
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R8 |
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R5 |
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11 |
SYNC |
OUT |
4 |
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R10 |
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CS |
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ILIM |
2 |
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14 |
SS |
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CF |
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C2 |
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RCS |
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1 |
COUNT |
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RF |
C3 |
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12 |
VREF |
PGND |
5 |
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R8 |
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RGND |
VIN RETURN |
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8 |
FB |
GND |
13 |
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R11 |
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C5 |
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VOUT |
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R13 |
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R12 |
C6 |
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R14 |
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C7 |
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R15 |
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UDG-98005-1 |
SLUS293A - JANUARY 2000 |
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ABSOLUTE MAXIMUM RATINGS
Supply voltage (Supply current limited to 20mA) . . . . . . . . 15V Supply Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Input pins ( ILIM,VFF,RT,CT,VSCLAMP,SYNC,SS) . . . . . . 6V Output Current (OUT) DC. . . . . . . . . . . . . . . . . . . . . +/–180mA Output Current (OUT) Pulse (0.5ms) . . . . . . . . . . . . . . +/–1.2A Storage Temperature. . . . . . . . . . . . . . . . . . . –65°C to +150°C Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . +300°C
Note: All voltages are with respect to GND. Currents are positive into the specified terminal. Consult Packaging Section of the Databook for thermal limitations and considerations of packages.
CONNECTION DIAGRAMS
DIL-14, SOIC-14, TSSOP-14 (TOP VIEW)
N or J, D, PW PACKAGE
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SS |
COUNT |
1 |
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14 |
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GND |
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ILIM |
2 |
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13 |
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VREF |
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VDD |
3 |
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12 |
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SYNC |
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OUT |
4 |
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11 |
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CT |
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PGND |
5 |
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10 |
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VFF |
6 |
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9 |
VSCLAMP |
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RT |
7 |
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8 |
FB |
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UCC15701/2
UCC25701/2
UCC35701/2
ORDERING INFORMATION
TA = TJ |
UVLO |
Package |
Part Number |
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Option |
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–55°C to +125°C |
13V / 9V |
CDIP-14 |
UCC15701J |
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9.6V / 8.8V |
CDIP-14 |
UCC15702J |
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SOIC-14 |
UCC25701D |
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13V / 9V |
PDIP-14 |
UCC25701N |
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–40°C to +85°C |
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TSSOP-14 |
UCC25701PW |
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SOIC-14 |
UCC25702D |
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9.6V / 8.8V |
PDIP-14 |
UCC25702N |
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TSSOP-14 |
UCC25702PW |
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SOIC-14 |
UCC35701D |
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13V / 9V |
PDIP-14 |
UCC35701N |
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0°C to +70°C |
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TSSOP-14 |
UCC35701PW |
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SOIC-14 |
UCC35702D |
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9.6V / 8.8V |
PDIP-14 |
UCC35702N |
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TSSOP-14 |
UCC35702PW |
The D and PW packages are available taped and reeled. Add TR suffix to the device type (e.g., UCC35701DTR).
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, VDD = 11V, RT = 60.4k, CT = 330pF, CREF = CVDD = 0.1 F, VFF = 2.0V, and no load on the outputs.
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
UVLO Section |
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Start Threshold |
(UCCX5701) |
12 |
13 |
14 |
V |
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(UCCX5702) |
8.8 |
9.6 |
10.4 |
V |
Stop Threshold |
(UCCX5701) |
8 |
9 |
10 |
V |
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(UCCX5702) |
8.0 |
8.8 |
9.6 |
V |
Hysteresis |
(UCCX5701) |
3 |
4 |
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V |
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(UCCX5702) |
0.3 |
0.8 |
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V |
Supply Current |
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Start-up Current |
(UCCX5701) VDD = 11V, VDD Comparator Off |
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130 |
200 |
A |
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(UCCX5702) VDD = 8V, VDD Comparator Off |
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120 |
190 |
A |
IDD Active |
VDD Comparator On |
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0.75 |
1.5 |
mA |
VDD Clamp Voltage |
(UCCX5701) IDD = 10mA |
13.5 |
14.3 |
15 |
V |
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(UCCX5702) IDD = 10mA |
13 |
13.8 |
15 |
V |
VDD Clamp – Start Threshold |
(UCCX5701) |
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1.3 |
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V |
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(UCCX5702) |
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4.2 |
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V |
Voltage Reference |
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VREF |
VDD = 10V to 13V, IVREF = 0mA to 2mA |
4.9 |
5 |
5.1 |
V |
Line Regulation |
VDD = 10V to 13V |
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20 |
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mV |
Load Regulation |
IVREF = 0mA to 2mA |
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2 |
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mV |
Short Circuit Current |
VREF = 0V, TJ = 25°C |
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20 |
50 |
mA |
2
UCC15701/2
UCC25701/2
UCC35701/2
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, VDD = 11V, RT = 60.4k, CT = 330pF, CREF = CVDD = 0.1
F, VFF = 2.0V, and no load on the outputs.
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
Line Sense |
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Vth High Line Comparator |
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3.9 |
4 |
4.1 |
V |
Vth Low Line Comparator |
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0.5 |
0.6 |
0.7 |
V |
Input Bias Current |
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–100 |
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100 |
nA |
Oscillator Section |
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Frequency |
VFF = 0.8V to 3.2V |
90 |
100 |
110 |
kHz |
Frequency |
VFF = 0.6V to 3.4V (Note 1) |
90 |
100 |
110 |
kHz |
SYNC VIH |
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2 |
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V |
SYNC VIL |
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0.8 |
V |
SYNC Input Current |
VSYNC = 2.0V |
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3 |
10 |
A |
RT Voltage |
VFF = 0.4V |
0.5 |
0.6 |
0.7 |
V |
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VFF = 0.8V |
0.75 |
0.8 |
0.85 |
V |
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VFF = 2.0V |
1.95 |
2.0 |
2.05 |
V |
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VFF = 3.2V |
3.15 |
3.2 |
3.25 |
V |
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VFF = 3.6V |
3.3 |
3.4 |
3.5 |
V |
CT Peak Voltage |
VFF = 0.8V (Note 1) |
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0.8 |
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V |
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VFF = 3.2V (Note 1) |
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3.2 |
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V |
CT Valley Voltage |
(Note 1) |
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0 |
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V |
Soft Start/Shutdown/Duty Cycle Control Section |
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ISS Charging Current |
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10 |
18 |
30 |
A |
ISS Discharging Current |
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300 |
500 |
750 |
A |
Saturation |
VDD = 11V, IC Off |
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25 |
100 |
mV |
Fault Counter Section |
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Threshold Voltage |
VFF = 0.8V to 3.2V |
3.8 |
4 |
4.2 |
V |
Saturation Voltage |
VFF = 0.8V to 3.2V |
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100 |
mV |
Count Charging Current |
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10 |
18 |
30 |
A |
Current Limit Section |
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Input Bias Current |
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–100 |
0 |
100 |
nA |
Current Limit Threshold |
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180 |
200 |
220 |
mV |
Shutdown Threshold |
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500 |
600 |
700 |
mV |
Pulse Width Modulator Section |
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FB Pin Input Impedance |
VFB = 3V |
30 |
50 |
100 |
k |
Minimum Duty Cycle |
VFB <= 1V |
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0 |
% |
Maximum Duty Cycle |
VFB >= 4.5V, VSCLAMP >= 2.0V |
95 |
99 |
100 |
% |
PWM Gain |
VFF = 0.8V |
35 |
50 |
70 |
%/V |
Volt Second Clamp Section |
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Maximum Duty Cycle |
VFF = 0.8V, VSCLAMP = 0.6V |
69 |
74 |
79 |
% |
Minimum Duty Cycle |
VFF = 3.2V, VSCLAMP = 0.6V |
17 |
19 |
21 |
% |
Output Section |
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VOH |
IOUT = –100mA, (VDD – VOUT) |
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0.4 |
1 |
V |
VOL |
IOUT = 100mA |
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0.4 |
1 |
V |
Rise Time |
CLOAD = 1000pF |
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20 |
100 |
ns |
Fall Time |
CLOAD = 1000pF |
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20 |
100 |
ns |
Note 1: Guaranteed by design. Not 100% tested in production.
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