UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
Current Mode PWM Controller
FEATURES
∙Optimized For Off-line And DC To DC Converters
∙Low Start Up Current (<1mA)
∙Automatic Feed Forward Compensation
∙Pulse-by-pulse Current Limiting
∙Enhanced Load Response Characteristics
∙Under-voltage Lockout With Hysteresis
∙Double Pulse Suppression
∙High Current Totem Pole Output
∙Internally Trimmed Bandgap Reference
∙500khz Operation
∙Low RO Error Amp
DESCRIPTION
The UC1842/3/4/5 family of control ICs provides the necessary features to implement off-line or DC to DC fixed frequency current mode control schemes with a minimal external parts count. Internally implemented circuits include un- der-voltage lockout featuring start up current less than 1mA, a precision reference trimmed for accuracy at the error amp input, logic to insure latched operation, a PWM comparator which also provides current limit control, and a totem pole output stage designed to source or sink high peak current. The output stage, suitable for driving N Channel MOSFETs, is low in the off state.
Differences between members of this family are the under-voltage lockout thresholds and maximum duty cycle ranges. The UC1842 and UC1844 have UVLO thresholds of 16V (on) and 10V (off), ideally suited to off-line applications. The corresponding thresholds for the UC1843 and UC1845 are 8.4V and 7.6V. The UC1842 and UC1843 can operate to duty cycles approaching 100%. A range of zero to 50% is obtained by the UC1844 and UC1845 by the addition of an internal toggle flip flop which blanks the output off every other clock cycle.
BLOCK DIAGRAM
Note 1: A/B A = DIL-8 Pin Number. B = SO-14 Pin Number. Note 2: Toggle flip flop used only in 1844 and 1845.
4/97
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage (Low Impedance Source) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V Supply Voltage (ICC <30mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Self Limiting Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1A Output Energy (Capacitive Load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5μJ Analog Inputs (Pins 2, 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.3V Error Amp Output Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Power Dissipation at TA ≤ 25°C (DIL-8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W Power Dissipation at TA ≤ 25°C (SOIC-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 725mW Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
Note 1: All voltages are with respect to Pin 5.
All currents are positive into the specified terminal.
Consult Packaging Section of Databook for thermal limitations and considerations of packages.
CONNECTION DIAGRAMS
DIL-8, SOIC-8 (TOP VIEW) |
PLCC-20 (TOP VIEW) |
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N or J Package, D8 Package |
Q Package |
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PACKAGE PIN FUNCTION |
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FUNCTION |
PIN |
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N/C |
1 |
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COMP |
2 |
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N/C |
3 |
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N/C |
4 |
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VFB |
5 |
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N/C |
6 |
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ISENSE |
7 |
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N/C |
8 |
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SOIC-14 (TOP VIEW) |
N/C |
9 |
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RT/CT |
10 |
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D Package |
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N/C |
11 |
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PWR GND |
12 |
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GROUND |
13 |
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N/C |
14 |
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OUTPUT |
15 |
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N/C |
16 |
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VC |
17 |
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VCC |
18 |
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N/C |
19 |
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VREF |
20 |
2
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for -55°C ≤ TA ≤ 125°C for the UC184X; -40°C ≤ TA ≤ 85°C for the UC284X; 0 °C ≤ TA ≤ 70°C for the 384X; V CC = 15V (Note 5); RT = 10k; CT =3.3nF, TA=TJ.
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UC1842/3/4/5 |
UC3842/3/4/5 |
UNITS |
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PARAMETER |
TEST CONDITIONS |
UC2842/3/4/5 |
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MIN |
TYP |
MAX |
MIN |
TYP |
MAX |
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Reference Section |
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Output Voltage |
TJ = 25°C, I O = 1mA |
4.95 |
5.00 |
5.05 |
4.90 |
5.00 |
5.10 |
V |
Line Regulation |
12 ≤ VIN ≤ 25V |
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6 |
20 |
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6 |
20 |
mV |
Load Regulation |
1 ≤ I0 ≤ 20mA |
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6 |
25 |
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6 |
25 |
mV |
Temp. Stability |
(Note 2) (Note 7) |
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0.2 |
0.4 |
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0.2 |
0.4 |
mV/°C |
Total Output Variation |
Line, Load, Temp. (Note 2) |
4.9 |
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5.1 |
4.82 |
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5.18 |
V |
Output Noise Voltage |
10Hz ≤ f ≤ 10kHz, TJ = 25°C (Note2) |
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50 |
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50 |
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μV |
Long Term Stability |
TA = 125°C, 1000Hrs. (Note 2) |
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5 |
25 |
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5 |
25 |
mV |
Output Short Circuit |
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-30 |
-100 |
-180 |
-30 |
-100 |
-180 |
mA |
Oscillator Section |
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Initial Accuracy |
TJ = 25°C (Note 6) |
47 |
52 |
57 |
47 |
52 |
57 |
kHz |
Voltage Stability |
12 ≤ VCC ≤ 25V |
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0.2 |
1 |
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0.2 |
1 |
% |
Temp. Stability |
TMIN ≤ TA ≤ TMAX (Note 2) |
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5 |
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5 |
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% |
Amplitude |
VPIN 4 peak to peak (Note 2) |
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1.7 |
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1.7 |
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V |
Error Amp Section |
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Input Voltage |
VPIN 1 = 2.5V |
2.45 |
2.50 |
2.55 |
2.42 |
2.50 |
2.58 |
V |
Input Bias Current |
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-0.3 |
-1 |
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-0.3 |
-2 |
μA |
AVOL |
2 ≤ VO ≤ 4V |
65 |
90 |
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65 |
90 |
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dB |
Unity Gain Bandwidth |
(Note 2) TJ = 25°C |
0.7 |
1 |
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0.7 |
1 |
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MHz |
PSRR |
12 ≤ VCC ≤ 25V |
60 |
70 |
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60 |
70 |
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dB |
Output Sink Current |
VPIN 2 = 2.7V, VPIN 1 = 1.1V |
2 |
6 |
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2 |
6 |
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mA |
Output Source Current |
VPIN 2 = 2.3V, VPIN 1 = 5V |
-0.5 |
-0.8 |
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-0.5 |
-0.8 |
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mA |
VOUT High |
VPIN 2 = 2.3V, RL = 15k to ground |
5 |
6 |
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5 |
6 |
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V |
VOUT Low |
VPIN 2 = 2.7V, RL = 15k to Pin 8 |
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0.7 |
1.1 |
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0.7 |
1.1 |
V |
Current Sense Section |
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Gain |
(Notes 3 and 4) |
2.85 |
3 |
3.15 |
2.85 |
3 |
3.15 |
V/V |
Maximum Input Signal |
VPIN 1 = 5V (Note 3) |
0.9 |
1 |
1.1 |
0.9 |
1 |
1.1 |
V |
PSRR |
12 ≤ VCC ≤ 25V (Note 3) (Note 2) |
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70 |
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70 |
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dB |
Input Bias Current |
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-2 |
-10 |
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-2 |
-10 |
μA |
Delay to Output |
VPIN 3 = 0 to 2V (Note 2) |
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150 |
300 |
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150 |
300 |
ns |
Note 2: These parameters, although guaranteed, are not 100% tested in production. Note 3: Parameter measured at trip point of latch with VPIN 2 = 0.
Note 4: Gain defined as
A = VPIN 1 , 0 ≤ VPIN 3 ≤ 0.8V VPIN 3
Note 5: Adjust VCC above the start threshold before setting at 15V.
Note 6: Output frequency equals oscillator frequency for the UC1842 and UC1843. Output frequency is one half oscillator frequency for the UC1844 and UC1845.
Note 7: Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation:
Temp Stability
= VREF (max) − VREF (min)
TJ (max) − TJ (min)
VREF (max) and VREF (min) are the maximum and minimum reference voltages measured over the appropriate temperature range. Note that the extremes in voltage do not necessarily occur at the extremes in temperature.
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