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INFO
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UC1872
UC2872
UC3872
Resonant Lamp Ballast Controller
FEATURES
•Controls Different Types of Lamps: Cold Cathode Fluorescent, Neon, and Gas Discharge
•Zero Voltage Switching (ZVS) of Push-Pull Drivers
•Accurate Control of Lamp Current
•Variable Lamp Intensity Control
•1 A Disable Current
•4.5V to 24V Operation
•Open Lamp Detection Circuitry
DESCRIPTION
The UC3872 is a resonant lamp ballast controller optimized for driving cold cathode fluorescent, neon, and other gas discharge lamps. The resonant power stage develops a sinusoidal lamp drive voltage, and minimizes switching loss and EMI generation. Lamp intensity adjustment is accomplished with a buck regulator, which is synchronized to the external power stage’s resonant frequency. Suitable for automotive and battery powered applications, the UC3872 draws only 1 A when disabled.
Soft start and open lamp detect circuitry have been incorporated to minimize component stresses. Open lamp detection is enabled at the completion of a soft start cycle. The chip is optimized for smooth duty cycle control to 100%.
Other features include a precision 1.2% reference, undervoltage lockout, and accurate minimum and maximum frequency control.
BLOCK DIAGRAM
VCC |
10 |
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UVLO |
3.0V |
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REF |
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REF |
9 |
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ENBL |
(HIGH=ENABLE) |
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PUSH PULL |
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11 |
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OUTPUTS |
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0.1V |
+ |
N-CHANNEL |
COMP |
4 |
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– |
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INV |
6 |
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– |
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OPEN |
TOGGLE |
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LAMP |
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EA |
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20 A |
+ |
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DETECT |
T |
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1.5V |
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PWM |
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SS |
5 |
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– |
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– 1 |
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200 |
A |
+ |
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0.2V |
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R |
CT |
7 |
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+ |
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S |
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OSCILLATOR |
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ZERO DETECT |
SENSE |
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OUT |
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ZD |
8 |
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BUCK DRIVE |
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– |
SYNC |
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0.5V |
+ |
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P-CHANNEL |
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14 |
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GND |
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Note: Pin numbers shown are for DIP package.
3 |
VC |
2 |
AOUT |
50k |
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1 |
BOUT |
50k |
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50k |
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12 |
COUT |
13 |
PGND |
UDG-99112 |
07/99
ABSOLUTE MAXIMUM RATINGS
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to +10V VCC, VC Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +24V ZD Input Current
High Impedance Source . . . . . . . . . . . . . . . . . . . . . . +10mA ZD Input Voltage
Low Impedance Source . . . . . . . . . . . . . . . . . . . . . . . . +24V Power Dissipation at TA = 25° C . . . . . . . . . . . . . . . . . . . . . . 1W Storage Temperature . . . . . . . . . . . . . . . . . . . −65° C to +150° C Lead Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300° C
Note 1: Currents are positive into, negative out of the specified terminal.
Note 2: Consult Packaging Section of Databook for thermal limitations and considerations of package.
UC1872
UC2872
UC3872
CONNECTION DIAGRAMS
SOIC-16, SSOP-16 (TOP VIEW)
DW, M Package
DIL-14 (TOP VIEW)
N Package
PLCC-20 (Top View)
Q Package
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these parameters apply for TJ = −55° C to +125°C for the UC1872, –40° C to +85° C for the UC2872, −0°C to +70°C for the UC3872; VCC= 5V, VC = 15V, VENBL = 5V, CT = 1nF, ZD = 1V.
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
Reference Section |
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Output Voltage |
TJ = 25° C |
2.963 |
3.000 |
3.037 |
V |
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Over Temperature |
2.940 |
3.000 |
3.060 |
V |
Line Regulation |
VCC = 4.75V to 18V |
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10 |
mV |
Load Regulation |
IO = 0 to −5mA |
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10 |
mV |
Oscillator Section |
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Free Running Frequency |
TJ = 25° C |
57 |
68 |
78 |
kHz |
Maximum Synchronization Frequency |
TJ = 25° C |
160 |
200 |
240 |
kHz |
Charge Current |
VCT = 1.5V |
180 |
200 |
220 |
µ A |
Voltage Stability |
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2 |
% |
Temperature Stability |
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4 |
8 |
% |
Zero Detect Threshold |
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0.46 |
0.5 |
0.56 |
V |
Error Amp Section |
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Input Voltage |
VO = 2V |
1.445 |
1.475 |
1.505 |
V |
Input Bias Current |
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−0.4 |
−2 |
µ A |
Open Loop Gain |
VO = 0.5 to 3V |
65 |
90 |
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dB |
Output High |
VINV = 1.3V |
3.1 |
3.5 |
3.9 |
V |
2
UC1872
UC2872
UC3872
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these parameters apply for TJ = −55° C to +125°C for the UC1872, –40° C to +85° C for the UC2872, −0°C to +70°C for the UC3872; VCC= 5V, VC = 15V, VENBL = 5V, CT = 1nF, ZD = 1V.
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
Error Amp Section (cont.) |
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Output Low |
VINV = 1.7V |
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0.1 |
0.2 |
V |
Output Source Current |
VINV = 1.3V, VO = 2V |
–350 |
–500 |
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A |
Output Sink Current |
VINV = 1.7V, VO = 2V |
10 |
20 |
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mA |
Common Mode Range |
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0 |
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VIN-1V |
V |
Unity Gain Bandwidth |
TJ = 25° C (Note 4) |
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1 |
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MHz |
Open Lamp Detect Section |
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Soft Start Threshold |
VINV = 0V |
2.9 |
3.4 |
3.8 |
V |
Open Lamp Detect Threshold |
VSS = 4.2V |
0.6 |
1.0 |
1.4 |
V |
Soft Start Current |
VSS = 2V |
10 |
20 |
40 |
µ A |
Output Section |
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Output Low Level |
IOUT = 0, Outputs A and B |
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0.05 |
0.2 |
V |
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IOUT = 10mA |
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0.1 |
0.4 |
V |
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IOUT = 100mA |
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1.5 |
2.2 |
V |
Output High Level |
IOUT = 0, Output C |
13.9 |
14.9 |
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V |
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IOUT = −10mA |
13.5 |
14.3 |
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V |
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IOUT = −100mA |
12.5 |
13.5 |
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V |
Rise Time |
TJ = 25° C, Cl = 1nF (Note 4) |
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30 |
80 |
ns |
Fall Time |
TJ = 25° C, Cl = 1nF (Note 4) |
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30 |
80 |
ns |
Output Dynamics |
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Out A and B Duty Cycle |
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48 |
49.9 |
50 |
% |
Out C Max Duty Cycle |
VINV = 1V |
100 |
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% |
Out C Min Duty Cycle |
VINV = 2V |
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0 |
% |
Under Voltage Lockout Section |
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Startup Threshold Voltage |
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3.7 |
4.2 |
4.5 |
V |
Hysteresis |
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120 |
200 |
280 |
mV |
Enable Section |
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Input High Threshold |
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2 |
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V |
Input Low Threshold |
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0.8 |
V |
Input Current |
VENBL = 5V |
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150 |
400 |
µ A |
Supply Current Section |
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VCC Supply Current |
VCC = 24V |
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6 |
14 |
mA |
VC Supply Current |
VC = 24V |
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5 |
12 |
mA |
ICC Disabled |
VCC = 24V, VENBL = 0V |
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1 |
10 |
µ A |
Note 3: Unless otherwise specified, all voltages are with respect to ground. Currents are positive into, and negative out of the specified terminal.
Note 4: Guaranteed by design. Not 100% tested in production.
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