Analog Devices AD673SD, AD673JP, AD673JN, AD673JD, AD673 Datasheet

a

8-Bit A/D Converter

AD673*

FEATURES

Complete 8-Bit A/D Converter with Reference, Clock and Comparator

30 ms Maximum Conversion Time

Full 8- or 16-Bit Microprocessor Bus Interface Unipolar and Bipolar Inputs

No Missing Codes Over Temperature Operates on +5 V and –12 V to –15 V Supplies MIL-STD-883 Compliant Version Available

GENERAL DESCRIPTION

The AD673 is a complete 8-bit successive approximation analog-to-digital converter consisting of a DAC, voltage reference, clock, comparator, successive approximation register (SAR) and 3-state output buffers—all fabricated on a single chip. No external components are required to perform a full accuracy 8-bit conversion in 20 μs.

The AD673 incorporates advanced integrated circuit design and processing technologies. The successive approximation function is implemented with I2L (integrated injection logic). Laser trimming of the high stability SiCr thin-film resistor ladder network insures high accuracy, which is maintained with a temperature compensated sub-surface Zener reference.

Operating on supplies of +5 V and –12 V to –15 V, the AD673 will accept analog inputs of 0 V to +10 V or –5 V to +5 V. The trailing edge of a positive pulse on the CONVERT line initiates the 20 μs conversion cycle. DATA READY indicates completion of the conversion.

The AD673 is available in two versions. The AD673J as specified over the 0°C to +70°C temperature range and the AD673S guarantees ±1/2 LSB relative accuracy and no missing codes from –55°C to +125°C.

Two package configurations are offered. All versions are also offered in a 20-pin hermetically sealed ceramic DIP. The AD673J is also available in a 20-pin plastic DIP.

*Protected by U.S. Patent Nos. 3,940,760; 4,213,806; 4,136,349; 4,400,689; and 4,400,690.

REV. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

FUNCTIONAL BLOCK DIAGRAM

	VCC	VSS	DIGITAL		CONVERT
			COMMON
ANALOG	5k					MSB
						DB7
IN
ANALOG						DB6
			8-BIT	8-BIT		DB5
COMMON			CURRENT
				SAR
			OUTPUT			DB4
			DAC
	COMP					DB3
						DB2
	ARATOR			INT
BIPOLAR				CLOCK		DB1
OFFSET						DB0
CONTROL
						LSB
						DATA
						ENABLE
DATA		BURIED ZENER REF			AD673
READY

PRODUCT HIGHLIGHTS

1.The AD673 is a complete 8-bit A/D converter. No external components are required to perform a conversion.

2.The AD673 interfaces to many popular microprocessors without external buffers or peripheral interface adapters.

3.The device offers true 8-bit accuracy and exhibits no missing codes over its entire operating temperature range.

4.The AD673 adapts to either unipolar (0 V to +10 V) or bipolar (–5 V to +5 V) analog inputs by simply grounding or opening a single pin.

5.Performance is guaranteed with +5 V and –12 V or –15 V supplies.

6.The AD673 is available in a version compliant with MIL- STD-883. Refer to the Analog Devices Military Products Databook or current AD673/883B data sheet for detailed specifications.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: [phone] Fax: [phone]

AD673–SPECIFICATIONS		(TA = +258C, V+ = +5 V, V– = –12 V or –15 V, all voltages measured with respect to
		digital common, unless otherwise noted)
			AD673J			AD673S
Model		Min	Typ	Max	Min	Typ	Max	Units
RESOLUTION			8			8		Bits
RELATIVE ACCURACY,l				61/2			61/2	LSB
TA = TMIN to TMAX				61/2			61/2	LSB
FULL-SCALE CALIBRATION2			±2			±2		LSB
UNIPOLAR OFFSET				61/2			61/2	LSB
BIPOLAR OFFSET				61/2			61/2	LSB
DIFFERENTIAL NONLINEARITY,3		8			8			Bits
TA = TMIN to TMAX		8			8			Bits
TEMPERATURE RANGE		0		+70	–55		+125	°C
TEMPERATURE COEFFICIENTS
Unipolar Offset				61			61	LSB
Bipolar Offset				61			61	LSB
Full-Scale Calibration2				62			62	LSB
POWER SUPPLY REJECTION
Positive Supply
+4.5 ≤ V+ ≤ +5.5 V				62			62	LSB
Negative Supply
–15.75 V ≤ V– ≤ –14.25 V				62			62	LSB
–12.6 V ≤ V– ≤ –11.4 V				62			62	LSB
ANALOG INPUT IMPEDANCE		3.0	5.0	7.0	3.0	5.0	7.0	kΩ
ANALOG INPUT RANGES
Unipolar		0		+10	0		+10	V
Bipolar		–5		+5	–5		+5	V
OUTPUT CODING
Unipolar		Positive True Binary			Positive True Binary
Bipolar		Positive True Offset Binary			Positive True Offset Binary
LOGIC OUTPUT
Output Sink Current
(VOUT = 0.4 V max, TMIN to TMAX)		3.2			3.2			mA
Output Source Current4
(VOUT = 2.4 V min, TMIN to TMAX)		0.5			0.5			mA
Output Leakage				640			640	μA
LOGIC INPUTS								μA
Input Current				6100			6100
Logic “1”		2.0			2.0			V
Logic “0”				0.8			0.8	V
CONVERSION TIME, TA and				30			30	μs
TMIN to TMAX		10	20		10	20
POWER SUPPLY
V+		+4.5	+5.0	+7.0	+4.5	+5.0	+7.0	V
V–		–11.4	–15	–16.5	–11.4	–15	–16.5	V
OPERATING CURRENT
V+			15	20		15	20	mA
V–			9	15		9	15	mA

NOTES

1Relative accuracy is defined as the deviation of the code transition points from the ideal transfer point on a straight line from the zero to the full scale of the device. 2Full-scale calibration is guaranteed trimmable to zero with an external 200 Ω potentiometer in place of the 15 Ω fixed resistor.

Full scale is defined as 10 volts minus 1 LSB, or 9.961 V. 3Defined as the resolution for which no missing codes will occur.

4The data output lines have active pull-ups to source 0 5 mA. The DATA READY line is open collector with a nominal 6 kΩ internal pull-up resistor.

Specifications subject to change without notice.

Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units.

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REV. A

AD673

ABSOLUTE MAXIMUM RATINGS
V+ to Digital Common . . . . . . . . . . . . . . . . . . .	. . 0 V to +7	V
V– to Digital Common . . . . . . . . . . . . . . . . . . .	0 V to –16.5 V
Analog Common to Digital Common . . . . . . . .	. . . . . . . ±1	V
Analog Input to Analog Common . . . . . . . . . . .	. . . . . . ±15	V
Control Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . 0 V to V+
Digital Outputs (High Impedance State) . . . . . . .	. . . 0 V to V+
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 800 mW

ORDERING GUIDE

	Temperature	Relative	Package Option1
Model	Range	Accuracy
AD673JN	0°C to +70°C	±1/2 LSB max	Plastic DIP (N-20)
AD673JD	0°C to +70°C	±1/2 LSB max	Ceramic DIP (D-20)
AD673SD2	–55°C to +125°C	±1/2 LSB max	Ceramic DIP (D-20)
AD673JP	0°C to +70°C	±1/2 LSB max	PLCC (P-20A)

NOTES

1D = Ceramic DIP; N = Plastic DIP; P = Plastic Leaded Chip Carrier.

2For details on grade and package offering screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook .

FUNCTIONAL DESCRIPTION

A block diagram of the AD673 is shown in Figure 1. The positive CONVERT pulse must be at least 500 ns wide. DR goes high within 1.5 μs after the leading edge of the convert pulse indicating that the internal logic has been reset. The negative edge of the CONVERT pulse initiates the conversion. The internal 8-bit current output DAC is sequenced by the integrated injection logic (I2L) successive approximation register (SAR) from its most significant bit to least significant bit to provide an output current which accurately balances the input signal current through the 5 kΩ resistor. The comparator determines whether the addition of each successively weighted bit current causes the DAC current sum to be greater or less than the input current; if the sum is more, the bit is turned off. After testing all bits, the SAR contains a 8-bit binary code which accurately represents the input signal to within (0.05% of full scale).

	V+	V–	DIGITAL		CONVERT
			COMMON
ANALOG	5k					MSB
						DB7
IN
ANALOG						DB6
			8-BIT	8-BIT		DB5
COMMON			CURRENT
				SAR
			OUTPUT
						DB4
			DAC
	COMP-					DB3
						DB2
	ARATOR			INT
BIPOLAR				CLOCK		DB1
OFFSET						DB0
CONTROL
						LSB
						DATA
						ENABLE
DATA		BURIED ZENER REF			AD673
READY

Figure 1. AD673 Functional Block Diagram

The SAR drives DR low to indicate that the conversion is complete and that the data is available to the output buffers. DATA

ENABLE can then be activated to enable the 8-bits of data desired. DATA ENABLE should be brought high prior to the next conversion to place the output buffers in the high impedance state.

REV. A

The temperature compensated buried Zener reference provides the primary voltage reference to the DAC and ensures excellent stability with both time and temperature. The bipolar offset input controls a switch which allows the positive bipolar offset current (exactly equal to the value of the MSB less 1/2 LSB) to be injected into the summing (+) node of the comparator to offset the DAC output. Thus the nominal 0 V to +10 V unipolar input range becomes a –5 V to +5 V range. The 5 kΩ thin-film input resistor is trimmed so that with a full-scale input signal, an input current will be generated which exactly matches the DAC output with all bits on.

UNIPOLAR CONNECTION

The AD673 contains all the active components required to perform a complete A/D conversion. Thus, for many applications, all that is necessary is connection of the power supplies (+5 V and –12 V to –15 V), the analog input and the convert pulse. However, there are some features and special connections which should be considered for achieving optimum performance. The functional pinout is shown in Figure 2.

The standard unipolar 0 V to +10 V range is obtained by shorting the bipolar offset control pin (Pin 16) to digital common (Pin 17).

	NC*	1	PIN 1	20	DATA ENABLE
	NC*		IDENTIFIER		NC
		2		19
	LSB DB0
		3		18	DATA READY
	DB1				DIGITAL COMMON
		4		17
	DB2		AD673		BIPOLAR OFFSET
		5		16
	DB3		TOP VIEW
		6		15	ANALOG COMMON
			(Not to Scale)
	DB4				ANALOG IN
		7		14
	DB5	8		13	V–
					CONVERT
	DB6	9		12
					V+
	MSB DB7	10		11

*PINS 1 & 2 ARE INTERNALLY

CONNECTED TO TEST POINTS AND SHOULD BE LEFT FLOATING

Figure 2. AD673 Pin Connections

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