Analog Devices AD621SQ-883B, AD621BR, AD621BN, AD621AR, AD621AN Datasheet

a	Low Drift, Low Power
	Instrumentation Amplifier

FEATURES EASY TO USE

Pin-Strappable Gains of 10 and 100

All Errors Specified for Total System Performance Higher Performance than Discrete In Amp Designs Available in 8-Lead DIP and SOIC

Low Power, 1.3 mA Max Supply Current Wide Power Supply Range ( 2.3 V to 18 V)

EXCELLENT DC PERFORMANCE 0.15% Max, Total Gain Error5 ppm/ C, Total Gain Drift

125 V Max, Total Offset Voltage

1.0 V/ C Max, Offset Voltage Drift

LOW NOISE

9 nV/√Hz, @ 1 kHz, Input Voltage Noise 0.28 V p-p Noise (0.1 Hz to 10 Hz)

EXCELLENT AC SPECIFICATIONS

800 kHz Bandwidth (G = 10), 200 kHz (G = 100) 12 s Settling Time to 0.01%

APPLICATIONS

Weigh Scales

Transducer Interface and Data Acquisition Systems

Industrial Process Controls

Battery-Powered and Portable Equipment

PRODUCT DESCRIPTION

The AD621 is an easy to use, low cost, low power, high accuracy instrumentation amplifier that is ideally suited for a wide range of applications. Its unique combination of high performance, small size and low power, outperforms discrete in amp implementations. High functionality, low gain errors, and low

	30,000
SCALE	25,000			3 OP AMP
FULLOF	20,000			IN AMP
				(3 OP 07S)
ppm	15,000
ERROR,	10,000	AD621A
TOTAL	5,000
	0	5	10	15	20
	0

SUPPLY CURRENT – mA

Figure 1. Three Op Amp IA Designs vs. AD621

AD621

CONNECTION DIAGRAM

8-Lead Plastic Mini-DIP (N), Cerdip (Q)

and SOIC (R) Packages

	G = 10/100	1					G = 10/100
						8
	–IN	2	AD621				+VS
						7
	+IN	3	TOP VIEW				OUTPUT
						6
			(Not to Scale)
	–VS	4					REF
						5

gain drift errors are achieved by the use of internal gain setting resistors. Fixed gains of 10 and 100 can easily be set via external pin strapping. The AD621 is fully specified as a total system, therefore, simplifying the design process.

For portable or remote applications, where power dissipation, size, and weight are critical, the AD621 features a very low supply current of 1.3 mA max and is packaged in a compact 8-lead SOIC, 8-lead plastic DIP or 8-lead cerdip. The AD621 also excels in applications requiring high total accuracy, such as precision data acquisition systems used in weigh scales and transducer interface circuits. Low maximum error specifications including nonlinearity of 10 ppm, gain drift of 5 ppm/°C, 50 V offset voltage, and 0.6 V/°C offset drift (“B” grade), make possible total system performance at a lower cost than has been previously achieved with discrete designs or with other monolithic instrumentation amplifiers.

When operating from high source impedances, as in ECG and blood pressure monitors, the AD621 features the ideal combination of low noise and low input bias currents. Voltage noise is specified as 9 nV/√Hz at 1 kHz and 0.28 V p-p from 0.1 Hz to 10 Hz. Input current noise is also extremely low at 0.1 pA/√Hz. The AD621 outperforms FET input devices with an input bias current specification of 1.5 nA max over the full industrial temperature range.

Vp-p

10,000

–

1,000

G = 100

TYPICAL STANDARD

NOISE,

10Hz)

100

BIPOLAR INPUT

IN AMP

VOLTAGE

(0.1–

10

AD621 SUPER ETA

INPUTTOTAL

BIPOLAR INPUT

1

IN AMP

0.1

1k

10k

100k

1M

10M

100M

SOURCE RESISTANCE –

REV. B

Figure 2. Total Voltage Noise vs. Source Resistance

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: [phone]	World Wide Web Site: http://www.analog.com
Fax: [phone]	© Analog Devices, Inc., 2001

AD621–SPECIFICATIONS

Gain = 10 (Typical @ 25 C, VS = 15 V, and RL = 2 k , unless otherwise noted.)

			AD621A			AD621B		AD621S1
Model	Conditions	Min	Typ	Max	Min	Typ	Max	Min	Typ	Max	Unit
GAIN
Gain Error	VOUT = ±10 V			0.15			0.05			0.15	%
Nonlinearity,
VOUT = –10 V to +10 V	RL = 2 kΩ		2	10		2	10		2	10	ppm of FS
Gain vs. Temperature			–1.5	±5		–1.5	±5		–1	±5	ppm/°C
TOTAL VOLTAGE OFFSET
Offset (RTI)	VS = ±15 V		75	250		50	125		75	250	µV
Over Temperature	VS = ±5 V to ±15 V			400			215			500	µV
Average TC	VS = ±5 V to ±15 V		1.0	2.5		0.6	1.5		1.0	2.5	µV/°C
Offset Referred to the
Input vs. Supply (PSR)2	VS = ±2.3 V to ± 18 V	95	120		100	120		95	120		dB
Total NOISE
Voltage Noise (RTI)	1 kHz		13	17		13	17		13	17	nV/√Hz
RTI	0.1 Hz to 10 Hz		0.55			0.55	0.8		0.55	0.8	µV p-p
Current Noise	f = 1 kHz		100			100			100		fA/√Hz
	0.1 Hz–10 Hz		10			10			10		pA p-p
INPUT CURRENT	VS = ±15 V
Input Bias Current			0.5	2.0		0.5	1.0		0.5	2	nA
Over Temperature				2.5			1.5			4	nA
Average TC			3.0			3.0			8.0		pA/°C
Input Offset Current			0.3	1.0		0.3	0.5		0.3	1.0	nA
Over Temperature				1.5			0.75			2.0	nA
Average TC			1.5			1.5			8.0		pA/°C
INPUT
Input Impedance
Differential			10 2			10 2			10 2		GΩ pF
Common-Mode	VS = ±2.3 V to ± 5 V		10 2			10 2			10 2		GΩ pF
Input Voltage Range3		–VS + 1.9		+VS – 1.2	–VS + 1.9		+VS – 1.2	–VS + 1.9		+VS – 1.2	V
Over Temperature	VS = ±5 V to ±18 V	–VS + 2.1		+VS – 1.3	–VS + 2.1		+VS – 1.3	–VS + 2.1		+VS – 1.3	V
		–VS + 1.9		+VS – 1.4	–VS + 1.9		+VS – 1.4	–VS + 1.9		+VS – 1.4	V
Over Temperature		–VS + 2.1		+VS – 1.4	–VS + 2.1		+VS – 1.4	–VS + 2.3		+VS – 1.4	V
Common-Mode Rejection
Ratio DC to 60 Hz with
1 kΩ Source Imbalance	VCM = 0 V to ± 10 V	93	110		100	110		93	110		dB
OUTPUT
Output Swing	RL = 10 kΩ,
	VS = ±2.3 V to ± 5 V	–VS + 1.1		+VS – 1.2	–VS + 1.1		+VS – 1.2	–VS + 1.1		+VS – 1.2	V
Over Temperature	VS = ±5 V to ±18 V	–VS + 1.4		+VS – 1.3	–VS + 1.4		+VS – 1.3	–VS + 1.6		+VS – 1.3	V
		–VS + 1.2		+VS – 1.4	–VS + 1.2		+VS – 1.4	–VS + 1.2		+VS – 1.4	V
Over Temperature		–VS + 1.6	±18	+VS – 1.5	–VS + 1.6	±18	+VS – 1.5	–VS + 2.3	±18	+VS – 1.5	V
Short Current Circuit											mA
DYNAMIC RESPONSE
Small Signal,
–3 dB Bandwidth			800			800			800		kHz
Slew Rate		0.75	1.2		0.75	1.2		0.75	1.2		V/µs
Settling Time to 0.01%	10 V Step		12			12			12		µs
REFERENCE INPUT
RIN			20			20			20		kΩ
IIN	VIN +, VREF = 0		50	60		50	60		+50	+60	µA
Voltage Range		–VS + 1.6		+VS – 1.6	–VS + 1.6		+VS – 1.6	VS + 1.6		+VS – 1.6	V
Gain to Output			1 ± 0.0001			1 ± 0.0001			1 ± 0.0001
POWER SUPPLY
Operating Range	VS = ±2.3 V to ±18 V	±2.3		±18	±2.3		±18	±2.3		±18	V
Quiescent Current			0.9	1.3		0.9	1.3		0.9	1.3	mA
Over Temperature			1.1	1.6		1.1	1.6		1.1	1.6	mA
TEMPERATURE RANGE
For Specified Performance			–40 to +85			–40 to +85			–55 to +125		°C

NOTES

1See Analog Devices’ military data sheet for 883B tested specifications. 2This is defined as the supply range over which PSRR is defined. 3Input Voltage Range = CMV + (Gain × VDIFF).

Specifications subject to change without notice.

–2–

REV. B

Gain = 100 (Typical @ 25 C, VS = 15 V, and RL = 2 k , unless otherwise noted.)

AD621

AD621A

AD621B

AD621S1

Model

Conditions

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

GAIN

Gain Error

VOUT = ±10 V

0.15

0.05

0.15

%

Nonlinearity,

VOUT = –10 V to +10 V

RL = 2 kΩ

2

10

2

10

2

10

ppm of FS

Gain vs. Temperature

–1

±5

–1

±5

–1

±5

ppm/°C

TOTAL VOLTAGE OFFSET

Offset (RTI)

VS = ±15 V

35

125

25

50

35

125

µV

Over Temperature

VS = ±5 V to ±15 V

185

215

225

µV

Average TC

VS = ±5 V to ±15 V

0.3

1.0

0.1

0.6

0.3

1.0

µV/°C

Offset Referred to the

Input vs. Supply (PSR)2

VS = ±2.3 V to ±18 V

110

140

120

140

110

140

dB

Total NOISE

Voltage Noise (RTI)

1 kHz

9

13

9

13

9

13

nV/√Hz

RTI

0.1 Hz to 10 Hz

0.28

0.28

0.4

0.28

0.4

µV p-p

Current Noise

f = 1 kHz

100

100

100

fA/√Hz

0.1 Hz–10 Hz

10

10

10

pA p-p

INPUT CURRENT

VS = ±15 V

Input Bias Current

0.5

2.0

0.5

1.0

0.5

2

nA

Over Temperature

2.5

1.5

4

nA

Average TC

3.0

3.0

8.0

pA/°C

Input Offset Current

0.3

1.0

0.3

0.5

0.3

1.0

nA

Over Temperature

1.5

0.75

2.0

nA

Average TC

1.5

1.5

8.0

pA/°C

INPUT

Input Impedance

Differential

10 2

10 2

10 2

GΩ pF

Common-Mode

VS = ±2.3 V to ±5 V

10 2

10 2

10 2

GΩ pF

Input Voltage Range3

–VS + 1.9

+VS – 1.2

–VS + 1.9

+VS – 1.2

–VS + 1.9

+VS – 1.2

V

Over Temperature

VS = ±5 V to ±18 V

–VS + 2.1

+VS – 1.3

–VS + 2.1

+VS – 1.3

–VS + 2.1

+VS – 1.3

V

–VS + 1.9

+VS – 1.4

–VS + 1.9

+VS – 1.4

–VS + 1.9

+VS – 1.4

V

Over Temperature

–VS + 2.1

+VS – 1.4

–VS + 2.1

+VS – 1.4

–VS + 2.3

+VS – 1.4

V

Common-Mode Rejection

Ratio DC to 60 Hz with

1 kΩ Source Imbalance

VCM = 0 V to ±10 V

110

130

120

130

110

130

dB

OUTPUT

Output Swing

RL = 10 kΩ,

VS = ±2.3 V to ±5 V

–VS + 1.1

+VS – 1.2

–VS + 1.1

+VS – 1.2

–VS + 1.1

+VS – 1.2

V

Over Temperature

VS = ±5 V to ±18 V

–VS + 1.4

+VS – 1.3

–VS + 1.4

+VS – 1.3

–VS + 1.6

+VS – 1.3

V

–VS + 1.2

+VS – 1.4

–VS + 1.2

+VS – 1.4

–VS + 1.2

+VS – 1.4

V

Over Temperature

–VS + 1.6

±18

+VS – 1.5

–VS + 1.6

±18

+VS – 1.5

–VS + 2.3

±18

+VS – 1.5

V

Short Current Circuit

mA

DYNAMIC RESPONSE

Small Signal,

–3 dB Bandwidth

200

200

200

kHz

Slew Rate

0.75

1.2

0.75

1.2

0.75

1.2

V/µs

Settling Time to 0.01%

10 V Step

12

12

12

µs

REFERENCE INPUT

RIN

20

20

20

kΩ

IIN

VIN +, VREF = 0

50

60

50

60

50

60

µA

Voltage Range

–VS + 1.6

+VS – 1.6

–VS + 1.6

+VS – 1.6

VS + 1.6

+VS – 1.6

V

Gain to Output

1 ± 0.0001

1 ± 0.0001

1 ± 0.0001

POWER SUPPLY

Operating Range

VS = ±2.3 V to ±18 V

±2.3

±18

±2.3

±18

±2.3

±18

V

Quiescent Current

0.9

1.3

0.9

1.3

0.9

1.3

mA

Over Temperature

1.1

1.6

1.1

1.6

1.1

1.6

mA

TEMPERATURE RANGE

For Specified Performance

–40 to +85

–40 to +85

–55 to +125

°C

NOTES

1See Analog Devices’ military data sheet for 883B tested specifications. 2This is defined as the supply range over which PSEE is defined. 3Input Voltage Range = CMV + (Gain × VDIFF).

Specifications subject to change without notice.

REV. B

–3–

AD621

ABSOLUTE MAXIMUM RATINGS1	± 18 V
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . .
Internal Power Dissipation2 . . . . . . . . . . . . . .	. . . . . . 650 mW
Input Voltage (Common Mode) . . . . . . . . . .	. . . . . . . . . . ±VS
Differential Input Voltage . . . . . . . . . . . . . . .	. . . . . . . . ± 25 V
Output Short Circuit Duration . . . . . . . . . . .	. . . . . Indefinite
Storage Temperature Range (Q) . . . . . . . . .	–65°C to +150°C
Storage Temperature Range (N, R) . . . . . . .	–65°C to +125°C
Operating Temperature Range	–40°C to +85°C
AD621 (A, B) . . . . . . . . . . . . . . . . . . . . . .
AD621 (S) . . . . . . . . . . . . . . . . . . . . . . . .	–55°C to +125°C
Lead Temperature Range	300°C
(Soldering 10 seconds) . . . . . . . . . . . . . . . .

NOTES

1Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

2Specification is for device in free air: 8-Lead Plastic Package: θJA = 95°C/W 8-Lead Cerdip Package: θJA = 110°C/W 8-Lead SOIC Package: θJA = 155°C/W

ESD SUSCEPTIBILITY

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 volts, which readily accumulate on the human body and on test equipment, can discharge without detection. Although the AD621 features proprietary ESD protection circuitry, permanent damage may still occur on these devices if they are subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid any performance degradation or loss of functionality.

ORDERING GUIDE

	Temperature	Package	Package
Model	Range	Description	Option1
AD621AN	–40°C to +85°C	8-Lead Plastic DIP	N-8
AD621BN	–40°C to +85°C	8-Lead Plastic DIP	N-8
AD621AR	–40°C to +85°C	8-Lead Plastic SOIC	R-8
AD621BR	–40°C to +85°C	8-Lead Plastic SOIC	R-8
AD621SQ/883B2	–55°C to +125°C	8-Lead Cerdip	Q-8
AD621ACHIPS	–40°C to +85°C	Die

NOTES

1N = Plastic DIP; Q = Cerdip; R = SOIC.

2See Analog Devices’ military data sheet for 883B specifications.

METALIZATION PHOTOGRAPH

Dimensions shown in inches and (mm).

Contact factory for latest dimensions.

	1.125 (3.57)
+VS		OUTPUT
7		6

RG 8

5 REFERENCE

0.0708

(2.545)

RG 1

4 –VS

2	3
–IN	+IN

–4–

REV. B

	50
	SAMPLE SIZE = 90
	40
UNITS	30
OF
PERCENTAGE	20
	10
	0	–100	0	+100	+200
	–200
		INPUT OFFSET VOLTAGE – V

TPC 1. Typical Distribution of VOS, Gain = 10

Typical Performance Characteristics–AD621

50

SAMPLE SIZE = 90

	40
UNITS	30
OF
PERCENTAGE	20
	10
	0	–400	0	+400	+800
	–800
		INPUT BIAS CURRENT – pA

TPC 4. Typical Distribution of Input Bias Current

	50
	SAMPLE SIZE = 90
	40
UNITS	30
OF
PERCENTAGE	20
	10
	0	–40	0	+40	+80
	–80
		INPUT OFFSET VOLTAGE – V

TPC 2. Typical Distribution of VOS, Gain = 100

50

SAMPLE SIZE = 90

	40
UNITS	30
OF
PERCENTAGE	20
	10
	0	–200	0	+200	+400
	–400
		INPUT OFFSET CURRENT – pA

TPC 3. Typical Distribution of Input Offset Current

		2.0
	– V	1.5
	VOLTAGE
	OFFSETIN	1.0
	CHANGE	0.5
		0

0

1

2

3

4

5

WARM-UP TIME – Minutes

TPC 5. Change in Input Offset Voltage vs. Warm-Up Time

	1000
Hz
NOISE – nV/	100
				GAIN = 10
VOLTAGE	10
			GAIN = 100
	1	10	100	1k	10k	100k
	1
			FREQUENCY – Hz

TPC 6. Voltage Noise Spectral Density

REV. B

–5–