a |
High Precision |
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5 V Reference |
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AD586 |
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Laser Trimmed to High Accuracy: 5.000 V 2.0 mV (M Grade)
Trimmed Temperature Coefficient:
2 ppm/ C Max, 0 C to 70 C (M Grade)
5 ppm/ C Max, –40 C to +85 C (B and L Grades) 10 ppm/ C Max, –55 C to +125 C (T Grade)
Low Noise, 100 nV/√Hz Noise Reduction Capability Output Trim Capability
MIL-STD-883-Compliant Versions Available Industrial Temperature Range SOICs Available Output Capable of Sourcing or Sinking 10 mA
VIN NOISE REDUCTION
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AD586 |
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RZ1 |
RS |
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R |
A1 |
VOUT |
Z2 |
RF |
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RT |
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TRIM |
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RI |
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GROUND |
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NOTE: PINS 1, 3, AND 7 ARE INTERNAL TEST POINTS. MAKE NO CONNECTIONS TO THESE POINTS.
The AD586 represents a major advance in the state-of-the-art in monolithic voltage references. Using a proprietary ion-implanted buried Zener diode and laser wafer trimming of high stability thin-film resistors, the AD586 provides outstanding performance at low cost.
The AD586 offers much higher performance than most other 5 V references. Because the AD586 uses an industry standard pinout, many systems can be upgraded instantly with the AD586.
The buried Zener approach to reference design provides lower noise and drift than bandgap voltage references. The AD586 offers a noise reduction pin which can be used to further reduce the noise level generated by the buried Zener.
The AD586 is recommended for use as a reference for 8-, 10-, 12-, 14-, or 16-bit D/A converters which require an external precision reference. The device is also ideal for successive approximation or integrating A/D converters with up to 14 bits of accuracy and, in general, can offer better performance than the standard on-chip references.
The AD586J, K, L, and M are specified for operation from 0°C to 70°C, the AD586A and B are specified for –40°C to +85°C operation, and the AD586S and T are specified for –55°C to +125°C operation. The AD586J, K, L, and M are available in an 8-lead plastic DIP. The AD586J, K, L, A, and B are available in an 8-lead plastic surface mount small outline (SO) package. The AD586J, K, L, S, and T are available in an 8-lead cerdip package.
REV. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
1.Laser trimming of both initial accuracy and temperature coefficients results in very low errors over temperature with-
out the use of external components. The AD586M has a maximum deviation from 5.000 V of ±2.45 mV between 0°C and 70°C, and the AD586T guarantees ±7.5 mV maximum total error between –55°C and +125°C.
2.For applications requiring higher precision, an optional finetrim connection is provided.
3.Any system using an industry standard pinout reference can be upgraded instantly with the AD586.
4.Output noise of the AD586 is very low, typically 4 V p-p. A noise reduction pin is provided for additional noise filtering using an external capacitor.
5.The AD586 is available in versions compliant with MIL- STD-883. Refer to the Analog Devices Military Products Databook or current AD586/883B data sheet for detailed specifications.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 |
www.analog.com |
Fax: 781/326-8703 |
© Analog Devices, Inc., 2001 |
AD586–SPECIFICATIONS (@ TA = 25 C, VIN = 15 V unless otherwise noted.)
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AD586J |
AD586K/A |
AD586L/B |
AD586M |
AD586S |
AD586T |
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Model |
Min |
Typ |
Max |
Min |
Typ |
Max |
Min Typ |
Max |
Min Typ Max |
Min Typ Max |
Min Typ Max |
Unit |
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Output Voltage |
4.980 |
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5.020 |
4.995 |
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5.005 |
4.9975 |
5.0025 |
4.998 |
5.002 |
4.990 |
5.010 |
4.9975 |
5.0025 |
V |
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Output Voltage Driftl |
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0°C to 70°C |
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25 |
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15 |
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5 |
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2 |
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ppm/°C |
–55°C to +125°C |
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20 |
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10 |
ppm/°C |
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Gain Adjustment |
+6 |
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+6 |
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+6 |
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+6 |
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+6 |
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+6 |
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% |
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–2 |
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–2 |
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–2 |
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–2 |
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–2 |
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–2 |
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% |
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Line Regulation1 |
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10.8 V < +VIN < 36 V |
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±V/V |
TMIN to TMAX |
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100 |
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100 |
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100 |
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100 |
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11.4 V < +VIN < 36 V |
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±V/V |
TMIN to TMAX |
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150 |
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150 |
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Load Regulationl |
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Sourcing 0 < IOUT < 10 mA |
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V/mA |
25°C |
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100 |
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100 |
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100 |
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100 |
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150 |
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150 |
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TMIN to TMAX |
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100 |
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100 |
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100 |
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100 |
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150 |
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150 |
V/mA |
Sinking –10 < IOUT < 0 mA |
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V/mA |
25°C |
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400 |
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400 |
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400 |
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400 |
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400 |
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400 |
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Quiescent Current |
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2 |
3 |
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2 |
3 |
2 |
3 |
2 |
3 |
2 |
3 |
2 |
3 |
mA |
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Power Consumption |
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30 |
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30 |
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30 |
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30 |
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30 |
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30 |
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mW |
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Output Noise |
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V p-p |
0.1 Hz to 10 Hz |
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4 |
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4 |
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4 |
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4 |
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4 |
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4 |
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Spectral Density, 100 Hz |
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100 |
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100 |
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100 |
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100 |
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100 |
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100 |
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nV/√Hz |
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Long-Term Stability |
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15 |
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15 |
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15 |
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15 |
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15 |
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15 |
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ppm/1000 Hr |
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Short-Circuit Current-to-Ground |
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45 |
60 |
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45 |
60 |
45 |
60 |
45 |
60 |
45 |
60 |
45 |
60 |
mA |
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Temperature Range |
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°C |
Specified Performance2 |
0 |
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70 |
0 |
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70 |
0 |
70 |
0 |
70 |
–55 |
+125 |
–55 |
+125 |
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–40 |
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+85 |
–40 |
+85 |
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°C |
Operating Performance3 |
–40 |
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+85 |
–40 |
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+85 |
–40 |
+85 |
–40 |
+85 |
–55 |
+125 |
–55 |
+125 |
°C |
NOTES
1Maximum output voltage drift is guaranteed for all packages and grades. Cerdip packaged parts are also 100°C production tested. 2Lower row shows specified performance for A and B grades.
3The operating temperature range is defined as the temperatures extremes at which the device will still function. Parts may deviate from their specified performance outside their specified temperature range.
Specifications subject to change without notice.
Specifications in boldface are rested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units unless otherwise specified.
VIN to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V Power Dissipation (25°C) . . . . . . . . . . . . . . . . . . . . . 500 mW
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C Lead Temp (Soldering, 10 sec) . . . . . . . . . . . . . . . . . . . 300°C Package Thermal Resistance
θJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22°C/W θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W Output Protection: Output safe for indefinite short to ground
or VIN.
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
CONNECTION DIAGRAM
(Top View)
TP* |
1 |
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8 |
NOISE |
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REDUCTION |
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V |
2 |
AD586 |
7 |
TP* |
IN |
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TOP VIEW |
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VOUT |
TP* |
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3 |
(Not to Scale) |
6 |
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GND |
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TRIM |
4 |
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5 |
*TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS, EXCEPT DUMMY PCB PAD, SHOULD BE MADE TOTHESE POINTS.
–2– |
REV. D |
AD586
The following specifications are tested at the dice level for AD586JCHIPS. These die are probed at 25 C DlE SPECIFlCATIONS only. (TA = 25 C, VIN = 15 V unless otherwise noted.)
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AD586JCHIPS |
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DIE LAYOUT |
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Parameter |
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Min |
Typ |
Max |
Unit |
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Output Voltage |
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4.980 |
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5.020 |
V |
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Gain Adjustment |
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+6 |
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% |
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–2 |
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% |
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Line Regulation |
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±V/V |
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10.8 V < + VIN < 36 V |
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100 |
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Load Regulation |
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V/mA |
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Sourcing 0 < IOUT < 10 mA |
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100 |
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Sinking –10 < IOUT < 0 mA |
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400 |
V/mA |
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Quiescent Current |
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3 |
mA |
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Short-Circuit Current-to-Ground |
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60 |
mA |
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NOTES |
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1Both VOUT pads should be connected to the output. |
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Die Thickness: The standard thickness of Analog Devices Bipolar dice is 24 mils ± 2 mils. |
Die Size: 0.096 0.061 Inches |
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Die Dimensions: The dimensions given have a tolerance of ± 2 mils. |
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Backing: The standard backside surface is silicon (not plated). Analog Devices does not |
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recommend gold-backed dice for most applications. |
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Edges: A diamond saw is used to separate wafers into dice thus providing perpendicular |
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edges halfway through the die. |
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In contrast to scribed dice, this technique provides a more uniform die shape and size. The |
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perpendicular edges facilitate handling (such as tweezer pick-up) while the uniform shape |
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and size simplifies substrate design and die attach. |
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Top Surface: The standard top surface of the die is covered by a layer of glassivation. All |
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areas are covered except bonding pads and scribe lines. |
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Surface Metalization: The metalization to Analog Devices bipolar dice is aluminum. |
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Minimum thickness is 10,000Å. |
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Bonding Pads: All bonding pads have a minimum size of 4 mils by 4 mils. The passivation |
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windows have 3.5 mils by 3.5 mils minimum. |
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ORDERING GUIDE |
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Model* |
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Initial |
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Temperature |
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Temperature |
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Package |
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Package |
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Error |
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Coefficient |
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Range |
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Description |
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Option |
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AD586JN |
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20 mV |
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25 ppm/°C |
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0°C to 70°C |
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Plastic DIP |
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N-8 |
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AD586JQ |
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20 mV |
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25 ppm/°C |
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0°C to 70°C |
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Cerdip |
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Q-8 |
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AD586JR |
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20 mV |
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25 ppm/°C |
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0°C to 70°C |
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SOIC |
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SO-8 |
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AD586KN |
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5 mV |
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15 ppm/°C |
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0°C to 70°C |
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Plastic DIP |
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N-8 |
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AD586KQ |
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5 mV |
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15 ppm/°C |
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0°C to 70°C |
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Cerdip |
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Q-8 |
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AD586KR |
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5 mV |
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15 ppm/°C |
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0°C to 70°C |
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SOIC |
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SO-8 |
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AD586LN |
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2.5 mV |
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5 ppm/°C |
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0°C to 70°C |
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Plastic DIP |
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N-8 |
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AD586LR |
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2.5 mV |
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5 ppm/°C |
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0°C to 70°C |
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SOIC |
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SO-8 |
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AD586MN |
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2 mV |
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2 ppm/°C |
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0°C to 70°C |
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Plastic DIP |
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N-8 |
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AD586AR |
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5 mV |
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15 ppm/°C |
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–40°C to +85°C |
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SOIC |
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SO-8 |
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AD586BR |
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2.5 mV |
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5 ppm/°C |
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–40°C to +85°C |
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SOIC |
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SO-8 |
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AD586LQ |
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2.5 mV |
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5 ppm/°C |
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0°C to 70°C |
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Cerdip |
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Q-8 |
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AD586SQ |
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10 mV |
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20 ppm/°C |
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–55°C to +125°C |
Cerdip |
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Q-8 |
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AD586TQ |
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2.5 mV |
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10 ppm/°C |
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–55°C to +125°C |
Cerdip |
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Q-8 |
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AD586JCHIPS |
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20 mV |
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25 ppm/°C |
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0°C to 70°C |
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*For details on grade and package offerings screened in accordance with MIL-STD-883, r efer to the Analog Devices Military Products Databook or current AD586/883B data sheet.
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD586 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. D |
–3– |