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5 V, Serial-Input |
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Voltage-Output, 16-Bit DACs |
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AD5541/AD5542 |
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FEATURES
Full 16-Bit Performance
5 V Single Supply Operation Low Power
Short Settling Time
Unbuffered Voltage Output Capable of Driving 60 kV
Loads Directly SPI™/QSPI™/MICROWIRE™-Compatible Interface
Standards
Power-On Reset Clears DAC Output to 0 V (Unipolar Mode)
Schmitt Trigger Inputs for Direct Optocoupler Interface
APPLICATIONS
Digital Gain and Offset Adjustment
Automatic Test Equipment
Data Acquisition Systems
Industrial Process Control
GENERAL DESCRIPTION
The AD5541 and AD5542 are single, 16-bit, serial input, voltage output DACs that operate from a single 5 V ± 10% supply.
The AD5541 and AD5542 utilize a versatile 3-wire interface that is compatible with SPI, QSPI, MICROWIRE, and DSP interface standards.
These DACs provide 16-bit performance without any adjustments. The DAC output is unbuffered, which reduces power consumption and offset errors contributed to by an output buffer.
The AD5542 can be operated in bipolar mode generating a
± VREF output swing. The AD5542 also includes Kelvin sense connections for the reference and analog ground pins to reduce layout sensitivity.
The AD5541 and AD5542 are available in an SO package.
FUNCTIONAL BLOCK DIAGRAMS
VDD
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AD5541 |
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REF |
16-BIT DAC |
VOUT |
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AGND |
CS |
16-BIT DATA LATCH |
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DIN |
CONTROL |
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SCLK |
LOGIC |
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SERIAL INPUT REGISTER |
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DGND |
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VDD
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AD5542 |
RFB |
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RINV |
RFB |
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INV |
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REFF |
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16-BIT DAC |
VOUT |
REFS |
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AGNDF |
CS |
16-BIT DATA LATCH |
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LDAC |
CONTROL |
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AGNDS |
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SCLK |
LOGIC |
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DIN |
SERIAL INPUT REGISTER |
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DGND |
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PRODUCT HIGHLIGHTS
1.Single Supply Operation.
The AD5541 and AD5542 are fully specified and guaranteed for a single 5 V ± 10% supply.
2.Low Power Consumption.
These parts consume typically 1.5 mW with a 5 V supply.
3.3-Wire Serial Interface.
4.Unbuffered output capable of driving 60 kΩ loads.
This reduces power consumption as there is no internal buffer to drive.
5.Power-On Reset circuitry.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corporation.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 |
World Wide Web Site: http://www.analog.com |
Fax: 781/326-8703 |
© Analog Devices, Inc., 1999 |
AD5541/AD5542–SPECIFICATIONS |
(VDD = 5 V 6 10%, VREF = 2.5 V, AGND = DGND = 0 V. All specifications |
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TA = TMIN to TMAX, unless otherwise noted.) |
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Parameter |
Min Typ |
Max |
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Unit |
Test Condition |
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STATIC PERFORMANCE |
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Resolution |
16 |
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Bits |
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Relative Accuracy, INL |
± 0.5 |
± 1.0 |
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LSB |
L, C Grades |
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± 0.5 |
± 2.0 |
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LSB |
B, J Grades |
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± 0.5 |
± 4.0 |
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LSB |
A Grade |
Differential Nonlinearity |
± 0.5 |
± 1.0 |
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LSB |
Guaranteed Monotonic |
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± 1.5 |
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LSB |
J Grade |
Gain Error |
–1.5 |
± 5 |
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LSB |
TA = 25°C |
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± 7 |
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LSB |
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Gain Error Temperature Coefficient |
± 0.1 |
± 1 |
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ppm/°C |
TA = 25°C |
Zero Code Error |
0.3 |
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LSB |
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± 2 |
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LSB |
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Zero Code Temperature Coefficient |
± 0.05 |
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ppm/°C |
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AD5542 |
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Ω/Ω |
RFB/RINV, Typically RFB = RINV = 28 kΩ |
Bipolar Resistor Matching |
1.000 |
± 0.0076 |
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± 0.0015 |
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% |
Ratio Error |
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Bipolar Zero Offset Error |
± 1 |
± 5 |
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LSB |
TA = 25°C |
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± 7 |
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LSB |
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Bipolar Zero Temperature Coefficient |
± 0.2 |
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ppm/°C |
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OUTPUT CHARACTERISTICS |
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Output Voltage Range |
0 |
VREF – 1 LSB |
V |
Unipolar Operation |
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–VREF |
VREF – 1 LSB |
V |
AD5542 Bipolar Operation |
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Output Voltage Settling Time |
1 |
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µs |
to 1/2 LSB of FS, CL = 10 pF |
Slew Rate |
25 |
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V/µs |
CL = 10 pF, Measured from 0% to 63% |
Digital-to-Analog Glitch Impulse |
10 |
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nV-s |
1 LSB Change Around the Major Carry |
Digital Feedthrough |
10 |
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nV-s |
All 1s Loaded to DAC, VREF = 2.5 V |
DAC Output Impedance |
6.25 |
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kΩ |
Tolerance Typically 20% |
Power Supply Rejection Ratio |
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± 1.0 |
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LSB |
VDD ± 10% |
DAC REFERENCE INPUT |
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Reference Input Range |
2.0 |
VDD |
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V |
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Reference Input Resistance2 |
9 |
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kΩ |
Unipolar Operation |
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7.5 |
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kΩ |
AD5542, Bipolar Operation |
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LOGIC INPUTS |
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± 1 |
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µA |
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Input Current |
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VINL, Input Low Voltage |
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0.8 |
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V |
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VINH, Input High Voltage |
2.4 |
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V |
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Input Capacitance3 |
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10 |
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pF |
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Hysteresis Voltage3 |
0.4 |
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V |
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REFERENCE |
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Reference –3 dB Bandwidth |
1.3 |
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MHz |
All 1s Loaded |
Reference Feedthrough |
1 |
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mV p-p |
All 0s Loaded, VREF = 1 V p-p at 100 kHz |
Signal-to-Noise Ratio |
92 |
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dB |
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Reference Input Capacitance |
75 |
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pF |
Code 0000 Hex |
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120 |
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pF |
Code FFFF Hex |
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POWER REQUIREMENTS |
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VDD |
4.50 |
5.50 |
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V |
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IDD |
0.3 |
1.1 |
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mA |
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Power Dissipation |
1.5 |
6.05 |
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mW |
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NOTES
1Temperature ranges are as follows: A, B, C Versions: –40°C to +85°C. J, L Versions: 0°C to 70°C. 2Reference input resistance is code-dependent, minimum at 8555 hex.
3Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2– |
REV. A |
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AD5541/AD5542 |
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1, 2 |
(VDD = 5 V 6 5%, VREF = 2.5 V, AGND = DGND = 0 V. All specifications TA = TMIN to TMAX, unless |
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TIMING CHARACTERISTICS |
otherwise noted.) |
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Limit at TMIN, TMAX |
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Parameter |
All Versions |
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Unit |
Description |
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fSCLK |
25 |
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MHz max |
SCLK Cycle Frequency |
t1 |
40 |
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ns min |
SCLK Cycle Time |
t2 |
20 |
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ns min |
SCLK High Time |
t3 |
20 |
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ns min |
SCLK Low Time |
t4 |
15 |
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ns min |
CS Low to SCLK High Setup |
t5 |
15 |
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ns min |
CS High to SCLK High Setup |
t6 |
35 |
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ns min |
SCLK High to CS Low Hold Time |
t7 |
20 |
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ns min |
SCLK High to CS High Hold Time |
t8 |
15 |
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ns min |
Data Setup Time |
t9 |
0 |
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ns min |
Data Hold Time |
t10 |
30 |
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ns min |
LDAC Pulsewidth |
t11 |
30 |
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ns min |
CS High to LDAC Low Setup |
t12 |
30 |
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ns min |
CS High Time Between Active Periods |
NOTES
1Guaranteed by design. Not production tested.
2Sample tested during initial release and after any redesign or process change that may affect this parameter. All input signals are measured with tr = tf = 5 ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.
Specifications subject to change without notice.
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t1 |
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SCLK |
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t6 |
t2 |
t3 |
t5 |
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t4 |
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t7 |
CS |
t12 |
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t8 |
t9 |
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DIN |
DB15 |
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DB0 |
t11
t10
LDAC*
*AD5542 ONLY. MAY BE TIED PERMANENTLY LOW IF REQUIRED.
Figure 1. Timing Diagram
REV. A |
–3– |
AD5541/AD5542
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V Digital Input Voltage to DGND . . . . . –0.3 V to VDD + 0.3 V
VOUT to AGND . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V AGND, AGNDF, AGNDS to DGND . . . . . –0.3 V to +0.3 V
Input Current to Any Pin Except Supplies . . . . . . . . ± 10 mA Operating Temperature Range
Industrial (A, B, C Versions) . . . . . . . . . . . –40°C to +85°C Commercial (J, L Versions) . . . . . . . . . . . . . . . 0°C to 70°C Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Maximum Junction Temperature, (TJ max) |
. . . . . . . . . 150°C |
Package Power Dissipation . . . . . . . . . . . . . |
(TJ max – TA)/θJA |
Thermal Impedance θJA |
149.5°C/W |
SOIC (SO-8) . . . . . . . . . . . . . . . . . . . . . . |
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SOIC (R-14) . . . . . . . . . . . . . . . . . . . . . . |
. . . . 104.5°C/W |
Lead Temperature, Soldering |
215°C |
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . |
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Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . 220°C |
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model |
INL |
DNL |
Temperature Range |
Package Description |
Package Option |
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AD5541CR |
± 1 LSB |
± 1 LSB |
–40°C to +85°C |
8-Lead Small Outline IC |
SO-8 |
AD5541LR |
± 1 LSB |
± 1 LSB |
0°C to 70°C |
8-Lead Small Outline IC |
SO-8 |
AD5541BR |
± 2 LSB |
± 1 LSB |
–40°C to +85°C |
8-Lead Small Outline IC |
SO-8 |
AD5541JR |
± 2 LSB |
± 1.5 LSB |
0°C to 70°C |
8-Lead Small Outline IC |
SO-8 |
AD5541AR |
± 4 LSB |
± 1 LSB |
–40°C to +85°C |
8-Lead Small Outline IC |
SO-8 |
AD5542CR |
± 1 LSB |
± 1 LSB |
–40°C to +85°C |
14-Lead Small Outline IC |
R-14 |
AD5542LR |
± 1 LSB |
± 1 LSB |
0°C to 70°C |
14-Lead Small Outline IC |
R-14 |
AD5542BR |
± 2 LSB |
± 1 LSB |
–40°C to +85°C |
14-Lead Small Outline IC |
R-14 |
AD5542JR |
± 2 LSB |
± 1.5 LSB |
0°C to 70°C |
14-Lead Small Outline IC |
R-14 |
AD5542AR |
± 4 LSB |
± 1 LSB |
–40°C to +85°C |
14-Lead Small Outline IC |
R-14 |
Die Size = 80 × 139 = 11,120 sq mil; Number of Transistors = 1,230.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD5541/AD5542 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4– |
REV. A |