Analog Devices AD544, AD542, AD547 Datasheet

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High Performance,

BiFET Operational Amplifiers

 

 

 

 

 

AD542/AD544/AD547

 

 

 

FEATURES

Ultralow Drift: 1 mV/8C (AD547L)

Low Offset Voltage: 0.25 mV (AD547L) Low Input Bias Currents: 25 pA max Low Quiescent Current: 1.5 mA

Low Noise: 2 mV p-p

High Open Loop Gain: 110 dB High Slew Rate: 13 V/ms Fast Settling to 60.01%: 3 ms

Low Total Harmonic Distortion: 0.0025% Available in Hermetic Metal Can and Die Form MIL-STD-883B Versions Available

Dual Versions Available: AD642, AD644, AD647

PRODUCT DESCRIPTION

The BiFET series of precision, monolithic FET-input op amps are fabricated with the most advanced BiFET and laser trimming technologies. The AD542, AD544, AD547 series offers bias currents significantly lower than currently available BiFET devices, 25 pA max, warmed up.

In addition, the offset voltage is laser trimmed to less than 0.25 mV on the AD547L, which is achieved by utilizing Analog Devices’ exclusive laser wafer trimming (LWT) process. When combined with the AD547’s low offset drift (1 μV/°C), these features offer the user performance superior to existing BiFET op amps at low BiFET pricing.

The AD542 or AD547 is recommended for any operational amplifier application requiring excellent dc performance at low to moderate cost. Precision instrument front ends requiring accurate amplification of millivolt level signals from megohm source impedances will benefit from the device’s excellent combination of low offset voltage and drift, low bias current and low 1/f noise. High common-mode rejection (80 dB, min on the “K” and “L” grades) and high open-loop gain, even under heavy loading, ensures better than “12-bit” linearity in high impedance buffer applications.

The AD544 is recommended for any op amp applications requiring excellent ac and dc performance at low cost. The

2 MHz bandwidth and low offset of the AD544 make it the first choice as an output amplifier for current output D/A converters, such as the AD7541, 12-bit CMOS DAC.

Devices in this series are available in four grades: the “J,” “K,” and “L” grades are specified over the 0°C to +70°C temperature range and the “S” grade over the –55°C to +125°C operating temperature range. All devices are offered in the hermetically sealed, TO-99 metal can package.

REV. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

CONNECTION DIAGRAM

 

 

TAB

 

 

 

8

 

NULL

1

7

+V

INVERTING

2

6

OUTPUT

INPUT

 

 

 

NONINVERTING

3

5

NULL

INPUT

 

4

 

 

 

 

–V

NOTE: PIN 4 CONNECTED TO CASE

PRODUCT HIGHLIGHTS

1.Improved bipolar and JFET processing results in the lowest bias current available in a monolithic FET op amp.

2.Analog Devices, unlike some manufacturers, specifies each device for the maximum bias current at either input in the warmed-up condition, thus assuring the user that the device will meet its published specifications in actual use.

3.Advanced laser wafer trimming techniques reduce offset voltage drift to 1 μV/°C max and offset voltage to only 0.25 mV max on the AD547L.

4.Low voltage noise (2 μV p-p) and low offset voltage drift enhance performance as a precision op amp.

5.High slew rate (13 V/μs) and fast settling time to 0.01% (3 μs) make the AD544 ideal for D/A, A/D, sample-hold circuits and high speed integrators.

6.Low harmonic distortion (0.0025%) make the AD544 an ideal choice in audio applications.

7.Bare die are available for use in hybrid circuit applications.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703

Analog Devices AD544, AD542, AD547 Datasheet

AD542/AD544/AD547–SPECIFICATIONS ( VS = 615 V @ TA = +258C unless otherwise noted)

 

 

AD542

 

 

AD544

 

 

AD547

 

 

Parameter

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Units

OPEN-LOOP GAIN1

 

 

 

 

 

 

 

 

 

 

VOUT = ±10 V, RL = 2 kΩ

100

 

 

30

 

 

100

 

 

 

J Grade

 

 

 

 

 

 

V/mV

K, L, S Grades

250

 

 

50

 

 

250

 

 

V/mV

TA = TMIN to TMAX

 

 

 

 

 

 

 

 

 

 

J Grade

100

 

 

20

 

 

100

 

 

V/mV

S Grade

100

 

 

20

 

 

100

 

 

V/mV

K, L Grades

250

 

 

40

 

 

250

 

 

V/mV

 

 

 

 

 

 

 

 

 

 

 

OUTPUT CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

RL = 2 kΩ

±10

±12

 

±10

±12

 

±10

±12

 

 

TA = TMIN to TMAX

 

 

 

V

RL = 10 kΩ

±12

±13

 

±12

±13

 

±12

±13

 

 

TA = TMIN to TMAX

 

 

 

V

Short Circuit Current

 

25

 

 

25

 

 

25

 

mA

 

 

 

 

 

 

 

 

 

 

 

FREQUENCY RESPONSE

 

 

 

 

 

 

 

 

 

 

Unity Gain, Small Signal

 

1.0

 

 

2.0

 

 

1.0

 

MHz

Full Power Response

 

50

 

 

200

 

 

50

 

kHz

Slew Rate, Unity Gain

2.0

3.0

 

8.0

13.0

 

2.0

3.0

 

V/μs

Total Harmonic Distortion

 

 

 

 

0.0025

 

 

 

 

%

 

 

 

 

 

 

 

 

 

 

 

INPUT OFFSET VOLTAGE2

 

 

 

 

 

 

 

 

 

 

J Grade

 

 

2.0

 

 

2.0

 

 

1.0

mV

K Grade

 

 

1.0

 

 

1.0

 

 

0.5

mV

L Grade

 

 

0.5

 

 

0.5

 

 

0.25

mV

S Grade

 

 

1.0

 

 

1.0

 

 

0.5

mV

vs. Temperature3

 

 

 

 

 

 

 

 

 

μV/°C

J Grade

 

 

20

 

 

20

 

 

5

K Grade

 

 

10

 

 

10

 

 

2

μV/°C

L Grade

 

 

5

 

 

5

 

 

1

μV/°C

S Grade

 

 

15

 

 

15

 

 

5

μV/°C

vs. Supply, TA = TMIN to TMAX

 

 

 

 

 

 

 

 

200

μV/V

J Grade

 

 

200

 

 

200

 

 

K, L, S Grades

 

 

100

 

 

100

 

 

100

μV/V

INPUT BIAS CURRENT4

 

 

 

 

 

 

 

 

 

 

Either Input

 

 

 

 

 

 

 

 

 

 

J Grade

 

 

50

 

 

50

 

 

50

pA

K, L, S Grades

 

10

25

 

10

25

 

10

25

pA

Input Offset Current

 

 

 

 

 

 

 

 

 

 

J Grade

 

5

15

 

5

15

 

5

15

pA

K, L, S Grades

 

2

15

 

2

15

 

2

15

pA

 

 

 

 

 

 

 

 

 

 

 

INPUT IMPEDANCE

 

1012i6

 

 

1012i6

 

 

1012i6

 

ΩipF

Differential

 

 

 

 

 

 

Common Mode

 

1012i3

 

 

1012i3

 

 

1012i3

 

ΩipF

INPUT VOLTAGE5

 

±20

 

 

±20

 

 

±20

 

 

Differential

±10

 

±10

 

±10

 

V

Common Mode

±12

 

±12

 

±12

 

V

Common-Mode Rejection

 

 

 

 

 

 

 

 

 

 

VIN = ±10 V

76

 

 

76

 

 

76

 

 

 

J Grade

 

 

 

 

 

 

dB

K, L, S Grades

80

 

 

80

 

 

80

 

 

dB

–2–

REV. B

AD542/AD544/AD547

 

 

AD542

 

 

AD544

 

 

AD547

 

 

 

 

 

Parameter

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Units

POWER SUPPLY

 

± 15

 

 

± 15

 

 

± 15

 

 

 

 

 

Rated Performance

± 5

±18

± 5

±18

± 5

±18

V

Operating

 

 

 

V

Quiescent Current

 

1.1

1.5

 

1.8

2.5

 

1.1

1.5

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOLTAGE NOISE

 

 

 

 

 

 

 

 

 

 

 

 

 

0.1 Hz to 10 Hz

 

 

 

 

 

 

 

 

 

mV p-p

J Grade

 

2.0

 

 

2.0

 

 

2.0

 

K, L, S Grades

 

2.0

 

 

2.0

 

 

 

4.0

mV p-p

10 Hz

 

70

 

 

35

 

 

70

 

nV/Ö

Hz

 

 

100 Hz

 

45

 

 

22

 

 

45

 

nV/Ö

 

 

 

 

 

 

 

 

Hz

1 kHz

 

30

 

 

18

 

 

30

 

nV/ÖHz

10 kHz

 

25

 

 

16

 

 

25

 

nV/Ö

Hz

 

TEMPERATURE RANGE

 

 

 

 

 

 

 

 

 

 

 

 

 

Operating, Rated Performance

 

 

 

 

 

 

 

 

 

°C

J, K, L Grades

 

0 to +70

 

 

0 to +70

 

 

0 to +70

 

S Grade

 

–55 to +125

 

 

–55 to +125

 

 

–55 to +125

 

°C

Storage

 

–65 to +150

 

 

–65 to +150

 

 

–65 to +150

 

°C

TRANSISTOR COUNT

29

 

 

29

 

 

29

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NOTES

1Open-Loop Gain is specified with VOS both nulled and unnulled.

2Input Offset Voltage specifications are guaranteed after 5 minutes of operation at TA = +25°C.

3Input Offset Voltage Drift is specified with the offset voltage unnulled. Nulling will induce an additional 3 μV/°C/mV of nulled offset.

4Bias Current specifications are guaranteed at either input after 5 minutes of operation at T A = +25°C. For higher temperatures, the current doubles every 10°C. 5Defined as the maximum safe voltage between inputs, such that neither exceeds ± 10 V from ground.

Specifications subject to change without notice.

Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units.

ORDERING GUIDE

 

Initial

Offset

Settling Time

 

 

 

Offset

Voltage

to 60.012% for

Package

Package

Model

Voltage

Drift

a 10 V Step

Description

Option

 

 

 

 

 

 

AD542JCHIPS

2.0 mV

20 mV/°C

5 ms

Bare Die

 

AD542JH

2.0 mV

20 mV/°C

5 ms

8-Pin Hermetic Metal Can

H-08A

AD542KH

1.0 mV

10 mV/°C

5 ms

8-Pin Hermetic Metal Can

H-08A

AD542LH

0.5 mV

5 mV/°C

5 ms

8-Pin Hermetic Metal Can

H-08A

AD542SH

1.0 mV

15 mV/°C

5 ms

8-Pin Hermetic Metal Can

H-08A

AD542SH/883B

1.0 mV

15 mV/°C

5 ms

8-Pin Hermetic Metal Can

H-08A

AD544JH

2.0 mV

20 mV/°C

3 ms

8-Pin Hermetic Metal Can

H-08A

AD544KH

1.0 mV

10 mV/°C

3 ms

8-Pin Hermetic Metal Can

H-08A

AD544LH

0.5 mV

5 mV/°C

3 ms

8-Pin Hermetic Metal Can

H-08A

AD544SH

1.0 mV

15 mV/°C

3 ms

8-Pin Hermetic Metal Can

H-08A

AD544SH/883B

1.0 mV

15 mV/°C

3 ms

8-Pin Hermetic Metal Can

H-08A

AD547JH

1.0 mV

5 mV/°C

5 ms

8-Pin Hermetic Metal Can

H-08A

AD547KH

0.5 mV

2 mV/°C

5 ms

8-Pin Hermetic Metal Can

H-08A

AD547LH

0.25 mV

1 mV/°C

5 ms

8-Pin Hermetic Metal Can

H-08A

AD547SCHIPS

0.5 mV

5 mV/°C

5 ms

Bare Die

 

AD547SH/883B

0.5 mV

5 mV/°C

5 ms

8-Pin Hermetic Metal Can

H-08A

REV. B

–3–

AD542/AD544/AD547–Typical Characteristics

Figure 1. Input Voltage Range vs. Supply Voltage

Figure 4. Input Bias Current vs. Supply Voltage

Figure 7. Change in Offset Voltage vs. Warm-Up Time

Figure 2. Output Voltage Swing vs. Supply Voltage

Figure 5. Input Bias Current vs. Temperature

Figure 8. Open Loop Gain vs. Temperature

Figure 3. Output Voltage Swing vs. Load Resistance

Figure 6. Input Bias Current vs. CMV

Figure 9. Open Loop Frequency

Response

–4–

REV. B

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