November 1988
Revised October 1999
74AC541 • 74ACT541
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The 74AC541 and 74ACT541 are octal buffer/line drivers designed to be employed as memory and address drivers, clock drivers and bus oriented transmitter/receivers.
These devices are similar in function to the 74AC244 and 74ACTC244 while providing flow-through architecture (inputs on opposite side from outputs). This pinout arrangement makes these devices especially useful as an output port for microprocessors, allowing ease of layout and greater PC board density.
Features
■ICC and IOZ reduced by 50%
■3-STATE outputs
■Inputs and outputs opposite side of package, allowing easier interface to microprocessors
■Output source/sink 24 mA
■74AC541 is a non-inverting option of the 74AC540
■74ACT541 has TTL-compatible inputs
Ordering Code:
Order Number |
Package Number |
Package Description |
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74AC541SC |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body |
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74AC541SJ |
M20D |
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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74AC541MTC |
MTC20 |
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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74AC541PC |
N20A |
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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74ACT541SC |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body |
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74ACT541MTC |
MTC20 |
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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74ACT541PC |
N20A |
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol |
Connection Diagram |
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IEEE/IEC |
Truth Table
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Inputs |
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Outputs |
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OE1 |
OE2 |
I |
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L |
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H |
H |
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H |
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X |
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Z |
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X |
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H |
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Z |
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L |
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L |
L |
L |
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H = HIGH Voltage Level |
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Z = High Impedance |
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X = Immaterial |
L = LOW Voltage Level |
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FACTä is a trademark of Fairchild Semiconductor Corporation.
Outputs STATE-3 with Driver Buffer/Line Octal 74ACT541 • 74AC541
© 1999 Fairchild Semiconductor Corporation |
DS009967 |
www.fairchildsemi.com |
74AC541 • 74ACT541
Absolute Maximum Ratings(Note 1)
Supply Voltage (V |
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−0.5V to +7.0V |
CC |
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DC Input Diode Current (IIK) |
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VI = −0.5V |
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−20 mA |
VI = VCC + 0.5V |
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+20 mA |
DC Input Voltage (VI) |
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−0.5V to VCC + 0.5V |
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DC Output Diode Current (IOK) |
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VO = −0.5V |
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−20 mA |
VO = VCC + 0.5V |
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+20 mA |
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DC Output Voltage (VO) |
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−0.5V to VCC + 0.5V |
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DC Output Source |
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or Sink Current (IO) |
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± 50 mA |
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DC VCC or Ground Current |
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per Output Pin (I |
CC |
or I |
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± 50 mA |
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GND |
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Storage Temperature (TSTG) |
−65°C to +150°C |
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Junction Temperature (TJ) |
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PDIP |
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140°C |
Recommended Operating
Conditions
Supply Voltage (VCC) |
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AC |
2.0V to 6.0V |
ACT |
4.5V to 5.5V |
Input Voltage (VI) |
0V to VCC |
Output Voltage (VO) |
0V to VCC |
Operating Temperature (TA) |
−40°C to +85°C |
Minimum Input Edge Rate ( V/ t) |
125 mV/ns |
AC: VIN from 30% to 70% of VCC |
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VCC @ 3.3V, 4.5V, 5.5V |
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ACT:VIN from 0.8V to 2.0V |
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VCC @ 4.5V, 5.5V |
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Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACTä circuits outside databook specifications.
DC Electrical Characteristics for AC
Symbol |
Parameter |
VCC |
TA = +25°C |
TA = −40°C to +85°C |
Units |
Conditions |
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(V) |
Typ |
Guaranteed Limits |
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VIH |
Minimum HIGH Level |
3.0 |
1.5 |
2.1 |
2.1 |
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VOUT = 0.1V |
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Input Voltage |
4.5 |
2.25 |
3.15 |
3.15 |
V |
or VCC − 0.1V |
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5.5 |
2.75 |
3.85 |
3.85 |
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VIL |
Maximum LOW Level |
3.0 |
1.5 |
0.9 |
0.9 |
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VOUT = 0.1V |
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Input Voltage |
4.5 |
2.25 |
1.35 |
1.35 |
V |
or VCC − 0.1V |
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5.5 |
2.75 |
1.65 |
1.65 |
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VOH |
Minimum HIGH Level |
3.0 |
2.99 |
2.9 |
2.9 |
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Output Voltage |
4.5 |
4.49 |
4.4 |
4.4 |
V |
IOUT = −50 μA |
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5.5 |
5.49 |
5.4 |
5.4 |
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VIN = VIL or VIH |
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3.0 |
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2.56 |
2.46 |
V |
IOH = −12 mA |
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4.5 |
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3.86 |
3.76 |
IOH = −24 mA |
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5.5 |
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4.86 |
4.76 |
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IOH = −24 mA (Note 2) |
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VOL |
Maximum LOW Level |
3.0 |
0.002 |
0.1 |
0.1 |
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Output Voltage |
4.5 |
0.001 |
0.1 |
0.1 |
V |
IOUT = 50 μA |
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5.5 |
0.001 |
0.1 |
0.1 |
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VIN = VIL or VIH |
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3.0 |
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0.36 |
0.44 |
V |
IOL = 12 mA |
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4.5 |
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0.36 |
0.44 |
IOL = 24 mA |
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5.5 |
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0.36 |
0.44 |
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IOL = 24 mA (Note 2) |
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IIN (Note 4) |
Maximum Input Leakage Current |
5.5 |
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± 0.1 |
± 1.0 |
μA |
VI = V CC, GND |
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IOZ |
Maximum 3-STATE |
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VI (OE) = V IL, VIH |
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Leakage Current |
5.5 |
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±0.25 |
±2.5 |
μA |
VI = VCC, GND |
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VO = VCC, GND |
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IOLD |
Minimum Dynamic |
5.5 |
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75 |
mA |
VOLD = 1.65V Max |
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IOHD |
Output Current (Note 3) |
5.5 |
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−75 |
mA |
VOHD = 3.85V Min |
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ICC (Note 4) |
Maximum Quiescent Supply Current |
5.5 |
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4.0 |
40.0 |
μA |
VIN = VCC or GND |
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Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
www.fairchildsemi.com |
2 |
AC Electrical Characteristics for AC
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VCC |
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TA = +25°C |
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TA = −40°C to +85°C |
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Symbol |
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Parameter |
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(V) |
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CL = 50 pF |
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CL = 50 pF |
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Units |
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(Note 5) |
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Min |
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Max |
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Min |
Max |
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tPLH |
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Propagation Delay |
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3.3 |
2.0 |
5.5 |
8.0 |
1.5 |
9.0 |
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Data to Output |
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5.0 |
1.5 |
4.0 |
6.0 |
1.0 |
6.5 |
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tPHL |
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Propagation Delay |
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3.3 |
2.0 |
5.5 |
8.0 |
1.5 |
8.5 |
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ns |
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Data to Output |
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5.0 |
1.5 |
4.0 |
6.0 |
1.0 |
6.5 |
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tPZH |
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Output Enable Time |
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3.3 |
3.0 |
8.0 |
11.5 |
3.0 |
12.5 |
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ns |
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5.0 |
2.0 |
6.0 |
8.5 |
1.5 |
9.5 |
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tPZL |
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Output Enable Time |
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3.3 |
2.5 |
7.0 |
10.0 |
2.5 |
11.5 |
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ns |
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5.0 |
1.5 |
5.5 |
7.5 |
1.0 |
8.5 |
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tPHZ |
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Output Disable Time |
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3.3 |
3.5 |
9.0 |
12.5 |
2.5 |
14.0 |
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ns |
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5.0 |
2.0 |
7.0 |
9.5 |
1.0 |
10.5 |
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tPLZ |
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Output Disable Time |
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3.3 |
2.5 |
6.5 |
9.5 |
2.0 |
10.5 |
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ns |
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5.0 |
2.0 |
5.5 |
7.5 |
1.0 |
8.5 |
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Note 5: Voltage |
Range 3.3 is 3.3V ± 0.3V |
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Voltage Range 5.0 is 5.0V ± 0.5V |
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DC Electrical Characteristics for ACT |
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Symbol |
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Parameter |
VCC |
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TA = +25°C |
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TA = −40°C to +85°C |
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Units |
Conditions |
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(V) |
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Typ |
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Guaranteed Limits |
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VIH |
Minimum HIGH Level |
4.5 |
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1.5 |
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2.0 |
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2.0 |
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V |
VOUT = 0.1V |
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Input Voltage |
5.5 |
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1.5 |
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2.0 |
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2.0 |
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or VCC − 0.1V |
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VIL |
Maximum LOW Level |
4.5 |
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1.5 |
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0.8 |
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0.8 |
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VOUT = 0.1V |
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Input Voltage |
5.5 |
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1.5 |
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0.8 |
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0.8 |
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or VCC − 0.1V |
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VOH |
Minimum HIGH Level |
3.0 |
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2.99 |
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2.9 |
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2.9 |
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V |
IOUT = −50 μA |
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Output Voltage |
4.5 |
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4.49 |
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4.4 |
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4.4 |
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4.5 |
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3.86 |
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3.76 |
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VIN = VIL or VIH |
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5.5 |
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4.86 |
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4.76 |
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V |
IOH = −24 mA |
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IOH = −24 mA (Note 6) |
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VOL |
Maximum LOW Level |
3.0 |
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0.002 |
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0.1 |
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0.1 |
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V |
IOUT = 50 μA |
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Output Voltage |
4.5 |
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0.001 |
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0.1 |
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0.1 |
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4.5 |
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0.36 |
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0.44 |
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VIN = VIL or VIH |
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5.5 |
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0.36 |
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0.44 |
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V |
IOH = 24 mA |
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IOH = 24 mA (Note 6) |
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IIN |
Maximum Input |
5.5 |
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± 0.1 |
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± 1.0 |
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μA |
VI = V CC, GND |
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Leakage Current |
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IOZ |
Maximum 3-STATE |
5.5 |
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±0.25 |
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±2.5 |
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μA |
VI = V IL, VIH |
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Leakage Current |
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VO = VCC, GND |
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ICCT |
Maximum ICC/Input |
5.5 |
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0.6 |
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1.5 |
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mA |
VI = VCC − 2.1V |
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IOLD |
Minimum Dynamic |
5.5 |
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75 |
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mA |
VOLD = 1.65V Max |
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IOHD |
Output Current (Note 7) |
5.5 |
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−75 |
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mA |
VOHD = 3.85V Min |
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ICC |
Maximum Quiescent |
5.5 |
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4.0 |
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40.0 |
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μA |
VIN = VCC or GND |
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Supply Current |
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Note 6: All outputs loaded; thresholds on input associated with output under test.
Note 7: Maximum test duration 2.0 ms, one output loaded at a time.
74ACT541 • 74AC541
3 |
www.fairchildsemi.com |
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