Fairchild Semiconductor 74ACTQ14SCX, 74ACTQ14SC, 74ACTQ14PC, 74ACTQ14MTCX, 74ACTQ14MTC Datasheet
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March 1991
Revised November 1999
74ACTQ14
Quiet Series Hex Inverter with Schmitt Trigger Input
General Description
The ACTQ14 contains six inverter gates each with a Schmitt trigger input. They are capable of transforming slowly changing input signals into sharply defined, jitterfree output signals. In addition, they have a greater noise margin than conventional inverters.
The ACTQ14 utilizes Fairchild Quiet Series Technology to guarantee quiet output switching and improve dynamic threshold performance. FACT Quiet Series features GTO output control and undershoot corrector in addition to a split ground bus for superior performance.
The ACTQ14 has hysteresis between the positive-going and negative-going input thresholds (typically 1.0V) which is determined internally by transistor ratios and is essentially insensitive to temperature and supply voltage variations.
Features
■ICC reduced by 50%
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Improved latch-up immunity
■Guaranteed pin-to-pin skew AC performance
■Outputs source/sink 24 mA
Ordering Code:
Order Number |
Package Number |
Package Description |
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74ACTQ14SC |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body |
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74ACTQ14MTC |
MTC14 |
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide |
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74ACTQ14PC |
N14A |
14-Lead Plastic Dual-In-Lead Package (PDIP), JEDEC MS-001, 0.300” Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol |
Connection Diagram |
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IEEE/IEC |
Pin Descriptions |
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Function Table |
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Input |
Output |
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Pin Names |
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Description |
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O |
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In |
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Inputs |
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L |
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Outputs |
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n |
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Quiet Series , FACT Quiet Series |
and GTO are trademarks of Fairchild Semiconductor Corporation. |
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Input Trigger Schmitt with Inverter Hex Series Quiet 74ACTQ14
© 1999 Fairchild Semiconductor Corporation |
DS010911 |
www.fairchildsemi.com |
74ACTQ14
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) |
− 0.5V to + 7.0V |
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DC Input Diode Current (IIK) |
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VI = |
− 0.5V |
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− 20 mA |
VI = |
VCC + 0.5V |
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+ 20 mA |
DC Input Voltage (VI) |
− 0.5V to VCC + 0.5V |
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DC Output Diode Current (IOK) |
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VO = |
− 0.5V |
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− 20 mA |
VO = |
VCC + 0.5V |
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+ 20 mA |
DC Output Voltage (VO) |
− 0.5V to VCC + 0.5V |
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DC Output Source |
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or Sink Current (IO) |
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50 mA |
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DC VCC or Ground Current |
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per Output Pin (ICC or IGND) |
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50 mA |
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Storage Temperature (TSTG) |
− 65° C to + 150° C |
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DC Latch-Up Source |
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or Sink Current |
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300 mA |
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Junction Temperature (TJ) |
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PDIP |
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140° C |
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Recommended Operating
Conditions
Supply Voltage (VCC) |
4.5V to 5.5 |
Input Voltage (VI) |
0V to VCC |
Output Voltage (VO) |
0V to VCC |
Operating Temperature (TA) |
− 40° C to + 85° C |
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside of databook specifications.
DC Electrical Characteristics
Symbol |
Parameter |
VCC |
T A = + 25° C |
TA = − 40° C to + 85° C |
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Conditions |
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(V) |
Typ |
Guaranteed Limits |
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VIH |
Minimum HIGH Level |
4.5 |
1.5 |
2.0 |
2.0 |
V |
VOUT = |
0.1V |
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Input Voltage |
5.5 |
1.5 |
2.0 |
2.0 |
or VCC − |
0.1V |
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VIL |
Maximum LOW Level |
4.5 |
1.5 |
0.8 |
0.8 |
V |
VOUT = |
0.1V |
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Input Voltage |
5.5 |
1.5 |
0.8 |
0.8 |
or VCC − |
0.1V |
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VOH |
Minimum HIGH Level |
4.5 |
4.49 |
4.4 |
4.4 |
V |
IOUT = |
− |
50 µ A |
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Output Voltage |
5.5 |
5.49 |
5.4 |
5.4 |
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VIN = |
VIL or VIH |
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4.5 |
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3.86 |
3.76 |
V |
IOH = |
− |
24 mA |
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5.5 |
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4.86 |
4.76 |
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IOH = |
− 24 mA (Note 2) |
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VOL |
Maximum LOW Level |
4.5 |
0.001 |
0.1 |
0.1 |
V |
IOUT = |
50 µ A |
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Output Voltage |
5.5 |
0.001 |
0.1 |
0.1 |
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VIN = |
VIL or VIH |
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4.5 |
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0.36 |
0.44 |
V |
IOL = |
24 mA |
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5.5 |
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0.36 |
0.44 |
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IOL = |
24 mA (Note 2) |
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IIN |
Maximum Input Leakage Current |
5.5 |
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± 0.1 |
± 1.0 |
µ A |
VI = |
VCC, GND |
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Vh(max) |
Maximum Hysteresis |
4.5 |
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1.4 |
1.4 |
V |
TA = |
Worst Case |
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5.5 |
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1.6 |
1.6 |
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Vh(min) |
Minimum Hysteresis |
4.5 |
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0.4 |
0.4 |
V |
TA = |
Worst Case |
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5.5 |
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0.5 |
0.5 |
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Vt+ |
Maximum Positive |
4.5 |
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2.0 |
2.0 |
V |
TA = |
Worst Case |
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Threshold |
5.5 |
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2.0 |
2.0 |
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Vt− |
Minimum Negative |
4.5 |
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0.8 |
0.8 |
V |
TA = |
Worst Case |
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Threshold |
5.5 |
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0.8 |
0.8 |
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ICCT |
Maximum ICC/Input |
5.5 |
0.6 |
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1.5 |
mA |
VI = |
VCC − 2.1V |
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IOLD |
Minimum Dynamic |
5.5 |
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75 |
mA |
VOLD = |
1.65V Max |
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IOHD |
Output Current (Note 3) |
5.5 |
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− 75 |
mA |
VOHD = |
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3.85V Min |
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ICC |
Maximum Quiescent Supply Current |
5.5 |
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2.0 |
20.0 |
µ A |
VIN = |
VCC or GND |
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VOLP |
Quiet Output Maximum |
5.0 |
1.1 |
1.5 |
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V |
Figure 1, Figure 2 |
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Dynamic VOL |
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(Note 4)(Note 5) |
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VOLV |
Quiet Output Minimum |
5.0 |
− 0.6 |
− 1.2 |
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V |
Figure 1, Figure 2 |
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Dynamic VOL |
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(Note 4)(Note 5) |
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www.fairchildsemi.com |
2 |
DC Electrical Characteristics (Continued)
Symbol |
Parameter |
VCC |
T A = + 25° C |
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TA = − 40° C to + 85° C |
Units |
Conditions |
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(V) |
Typ |
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Guaranteed Limits |
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VIHD |
Minimum HIGH Level Dynamic Input Voltage |
5.0 |
1.9 |
2.2 |
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V |
(Note 4)(Note 6) |
VILD |
Maximum LOW Level Dynamic Input Voltage |
5.0 |
1.2 |
0.8 |
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V |
(Note 4)(Note 6) |
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: DIP package.
Note 5: Max number of outputs defined as (n). Data inputs are 0V to 3V. One output @ GND.
Note 6: Max number of data inputs (n) switching. (n− 1) inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz.
AC Electrical Characteristics
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VCC |
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TA = + 25° C |
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TA = − 40° C to + 85° C |
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Symbol |
Parameter |
(V) |
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CL = 50 pF |
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CL = |
50 pF |
Units |
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(Note 7) |
Min |
Typ |
Max |
Min |
Max |
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tPLH |
Propagation Delay |
5.0 |
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3.0 |
8.0 |
10.0 |
3.0 |
11.0 |
ns |
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Data to Output |
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tPHL |
Propagation Delay |
5.0 |
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3.0 |
8.0 |
10.0 |
3.0 |
11.0 |
ns |
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Data to Output |
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tOSHL |
Output to Output |
5.0 |
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0.5 |
1.0 |
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1.0 |
ns |
tOSLH |
Skew (Note 8) |
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Note 7: Voltage |
Range 5.0 is 5.0V ± 0.5V. |
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Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.
Capacitance
Symbol |
Parameter |
Typ |
Units |
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Conditions |
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CIN |
Input Capacitance |
4.5 |
pF |
VCC = |
OPEN |
CPD |
Power Dissipation Capacitance |
80 |
pF |
VCC = |
5.0V |
74ACTQ14
3 |
www.fairchildsemi.com |
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