Fairchild Semiconductor 74ACT521SJX, 74ACT521SJ, 74ACT521SCX, 74ACT521SC, 74ACT521PC Datasheet
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November 1988
Revised November 1999
74AC521 • 74ACT521 8-Bit Identity Comparator
General Description
The AC/ACT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.
Features
■ICC reduced by 50%
■Compares two 8-bit words in 6.5 ns typ
■Expandable to any word length
■20-pin package
■Outputs source/sink 24 mA
■ACT521 has TTL-compatible inputs
Ordering Code:
Order Number |
Package Number |
Package Description |
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74AC521SC |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body |
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74AC521SJ |
M20D |
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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74AC521PC |
N20A |
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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74ACT521SC |
M20B |
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body |
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74ACT521SJ |
M20D |
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide |
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74ACT521PC |
N20A |
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering table.
Logic Symbols |
Connection Diagram |
IEEE/IEC
Pin Descriptions
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Pin Names |
Description |
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A0–A7 |
Word A Inputs |
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B0–B7 |
Word B Inputs |
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TA = B |
Expansion or Enable Input |
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Identity Output |
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O |
A = B |
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FACT is a trademark of Fairchild Semiconductor Corporation.
Comparator Identity Bit-8 74ACT521 • 74AC521
© 1999 Fairchild Semiconductor Corporation |
DS009964 |
www.fairchildsemi.com |
74AC521 • 74ACT521
Truth Table |
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Logic Diagram |
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Inputs |
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Outputs |
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IA = B |
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A, B |
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OA = B |
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L |
A = |
B (Note 1) |
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L |
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L |
A ≠ Β |
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H |
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H |
A = |
B (Note 1) |
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H |
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H |
A ≠ Β |
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H |
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H = HIGH Voltage Level |
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L = LOW Voltage Level |
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Note 1: A0 = B0, A1 = B1, A2 = B2, etc.
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Applications
Ripple Expansion
Parallel Expansion
www.fairchildsemi.com |
2 |
Absolute Maximum Ratings(Note 2)
Supply Voltage (V ) |
− 0.5V to + 7.0V |
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CC |
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DC Input Diode Current (IIK) |
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VI = |
− 0.5V |
− 20 mA |
VI = |
VCC + 0.5V |
+ 20 mA |
DC Input Voltage (VI) |
− 0.5V to VCC + 0.5V |
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DC Output Diode Current (IOK) |
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VO = |
− 0.5V |
− 20 mA |
VO = |
VCC + 0.5V |
+ 20 mA |
DC Output Voltage (VO) |
− 0.5V to VCC + 0.5V |
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DC Output Source |
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or Sink Current (IO) |
± 50 mA |
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DC VCC or Ground Current |
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per Output Pin (ICC or IGND) |
± 50 mA |
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Storage Temperature (TSTG) |
− 65° C to + 150° C |
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Junction Temperature (TJ) |
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PDIP |
140° C |
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Recommended Operating
Conditions
Supply Voltage (VCC) |
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AC |
2.0V to 6.0V |
ACT |
4.5V to 5.5V |
Input Voltage (VI) |
0V to VCC |
Output Voltage (VO) |
0V to VCC |
Operating Temperature (TA) |
− 40° C to + 85° C |
Minimum Input Edge Rate (∆ V/∆ t) |
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AC Devices |
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VIN from 30% to 70% of VCC |
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VCC @ 3.3V, 4.5V, 5.5V |
125 mV/ns |
Minimum Input Edge Rate (∆ V/∆ t) |
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ACT Devices |
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VIN from 0.8V to 2.0V |
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VCC @ 4.5V, 5.5V |
125 mV/ns |
Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for AC
Symbol |
Parameter |
VCC |
TA = + 25° C |
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TA = − 40° C to + 85° C |
Units |
Conditions |
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(V) |
Typ |
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Guaranteed Limits |
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VIH |
Minimum HIGH Level |
3.0 |
1.5 |
2.1 |
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2.1 |
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VOUT = |
0.1V |
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Input Voltage |
4.5 |
2.25 |
3.15 |
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3.15 |
V |
or VCC − |
0.1V |
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5.5 |
2.75 |
3.85 |
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3.85 |
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VIL |
Maximum LOW Level |
3.0 |
1.5 |
0.9 |
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0.9 |
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VOUT = |
0.1V |
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Input Voltage |
4.5 |
2.25 |
1.35 |
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1.35 |
V |
or VCC − |
0.1V |
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5.5 |
2.75 |
1.65 |
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1.65 |
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VOH |
Minimum HIGH Level |
3.0 |
2.99 |
2.9 |
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2.9 |
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Output Voltage |
4.5 |
4.49 |
4.4 |
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4.4 |
V |
IOUT = |
− |
50 µ A |
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5.5 |
5.49 |
5.4 |
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5.4 |
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VIN = V IL or VIH |
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3.0 |
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2.56 |
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2.46 |
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IOH = − 12 mA |
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4.5 |
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3.86 |
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3.76 |
V |
IOH = − 24 mA |
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5.5 |
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4.86 |
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4.76 |
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IOH = − 24 mA (Note 3) |
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VOL |
Maximum LOW Level |
3.0 |
0.002 |
0.1 |
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0.1 |
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Output Voltage |
4.5 |
0.001 |
0.1 |
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0.1 |
V |
IOUT = |
50 µ A |
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5.5 |
0.001 |
0.1 |
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0.1 |
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VIN = V IL or VIH |
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3.0 |
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0.36 |
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0.44 |
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IOL = 12 mA |
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4.5 |
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0.36 |
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0.44 |
V |
IOL = 24 mA |
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5.5 |
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0.36 |
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0.44 |
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IOL = 24 mA (Note 3) |
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IIN |
Maximum Input |
5.5 |
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± 0.1 |
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± 1.0 |
µ A |
VI = V CC, GND |
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(Note 5) |
Leakage Current |
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IOLD |
Minimum Dynamic |
5.5 |
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75 |
mA |
VOLD = |
1.65V Max |
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IOHD |
Output Current (Note 4) |
5.5 |
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− 75 |
mA |
VOHD = |
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3.85V Min |
ICC |
Maximum Quiescent |
5.5 |
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4.0 |
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40.0 |
µ A |
VIN = V CC |
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(Note 5) |
Supply Current |
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or GND |
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Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
74ACT521 • 74AC521
3 |
www.fairchildsemi.com |
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