UCC1946
UCC2946
UCC3946
Microprocessor Supervisor with Watchdog Timer
FEATURES
•Fully Programmable Reset Threshold
•Fully Programmable Reset Period
•Fully Programmable Watchdog Period
•2% Accurate Reset Threshold
•VDD Can Go as Low as 2V
•18 A Maximum IDD
•Reset Valid Down to 1V
DESCRIPTION
The UCC3946 is designed to provide accurate microprocessor supervision, including reset and watchdog functions. During power up, the IC asserts a reset signal RES with VDD as low as 1V. The reset signal remains asserted until the VDD voltage rises and remains above the reset threshold for the reset period. Both reset threshold and reset period are programmable by the user. The IC is also resistant to glitches on the VDD line. Once RES has been deasserted, any drops below the threshold voltage need to be of certain time duration and voltage magnitude to generate a reset signal. These values are shown in Figure 1. An I/O line of the microprocessor may be tied to the watchdog input (WDI) for watchdog functions. If the I/O line is not toggled within a set watchdog period, programmable by the user, WDO will be asserted. The watchdog function will be disabled during reset conditions.
The UCC3946 is available in 8-pin SOIC(D), 8-pin DIP (N or J) and 8-pin TSSOP(PW) packages to optimize board space.
BLOCK DIAGRAM
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VDD |
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8 |
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400nA |
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POWER TO |
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CIRCUITRY |
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RP |
4 |
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1.235V . |
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3 |
RES |
RTH |
2 |
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POWER ON RESET |
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400nA |
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8-BIT COUNTER |
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WP |
6 |
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A3 |
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A2 |
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100mV |
CLR |
A1 |
5 |
WDO |
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A0 |
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CLK |
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1.235V |
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WATCHDOG TIMING |
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WDI |
7 |
EDGE DETECT |
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1 |
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GND |
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UDG-98001 |
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Note: Pinout represents the 8-pin TSSOP package.
SLUS247B - FEBRUARY 2000
UCC1946
UCC2946
UCC3946
ABSOLUTE MAXIMUM RATINGS |
CONNECTION DIAGRAM |
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Databook for thermal limitations and considerations of packages.
SOIC-8, TSSOP-8, DIL-8 (Top View) D, PW, N or J Package
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GND |
1 |
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8 |
VDD |
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RTH |
2 |
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7 |
WDI |
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RES |
3 |
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6 |
WP |
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RP |
4 |
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5 |
WDO |
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ELECTRICAL CHARACTERISTICS: Unless otherwise specified, VDD = 2.1V to 5.5V for UCC1946 and UCC2946;
VDD = 2V to 5.5V for UCC3946; TA = 0°C to 70°C for UCC3946, –40°C to 95°C for UCC2946, and –55°C to 125°C for UCC1946; TA = TJ
PARAMETERS |
TEST CONDITIONS |
MIN |
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TYP |
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MAX |
MIN |
TYP |
MAX |
UNITS |
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UCC3946 |
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UCC1946 & UCC2946 |
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Operating Voltage |
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2.0 |
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5.5 |
2.1 |
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5.5 |
V |
Supply Current |
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10 |
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18 |
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12 |
18 |
A |
Minimum VDD |
(Note 1) |
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1 |
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1.1 |
V |
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Reset Section |
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Reset Threshold |
VDD Rising |
1.210 |
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1.235 |
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1.260 |
1.170 |
1.235 |
1.260 |
V |
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Threshold Hysteresis |
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15 |
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15 |
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mV |
Input Leakage |
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5 |
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5 |
nA |
Output High Voltage |
ISOURCE = 2mA |
VDD – |
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VDD – |
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V |
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0.3 |
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0.3 |
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Output Low Voltage |
ISINK = 2mA |
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0.1 |
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0.1 |
V |
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VDD = 1V, ISINK = 20uA |
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0.2 |
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0.4 |
V |
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VDD to Output Delay |
VDD = -1mV/ s (Note 2) |
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120 |
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120 |
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s |
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Reset Period |
CRP = 64nF |
160 |
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200 |
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260 |
140 |
200 |
320 |
ms |
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Watchdog Section |
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WDI Input High |
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0.7· |
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0.7· |
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V |
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VDD |
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VDD |
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WDI Input Low |
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0.3· |
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0.3· |
V |
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VDD |
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VDD |
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Watchdog Period |
CWP = 64nF |
1.12 |
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1.60 |
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2.08 |
0.96 |
1.60 |
2.56 |
s |
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Watchdog Pulse Width |
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50 |
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50 |
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ns |
Output High Voltage |
ISOURCE = 2mA |
VDD – |
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VDD – |
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V |
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0.3 |
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0.3 |
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Output Low Voltage |
ISINK = 2mA |
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0.1 |
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0.1 |
V |
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Note 1: This is the minimum supply voltage where RES is considered valid.
Note 2: Guaranteed by design. Not 100% tested in production.
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