MOTOROLA MC74HC14ADTEL, MC74HC14ADTR2, MC74HC14AF, MC74HC14AFEL, MC74HC14AFL1 Datasheet

MC74HC14A

Hex Schmitt-Trigger

Inverter

High±Performance Silicon±Gate CMOS

The MC74HC14A is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

The HC14A is useful to ªsquare upº slow input rise and fall times. Due to hysteresis voltage of the Schmitt trigger, the HC14A finds applications in noisy environments.

•Output Drive Capability: 10 LSTTL Loads

•Outputs Directly Interface to CMOS, NMOS and TTL

•Operating Voltage Range: 2 to 6V

•Low Input Current: 1μA

•High Noise Immunity Characteristic of CMOS Devices

•In Compliance With the JEDEC Standard No. 7A Requirements

•Chip Complexity: 60 FETs or 15 Equivalent Gates

		LOGIC DIAGRAM
1		2
A1							Y1
3		4
A2							Y2
5		6
A3							Y3
							Y =
								A
9		8
A4							Y4 Pin 14 = VCC
							Pin 7 = GND
11		10
A5							Y5
13		12
A6							Y6

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			MARKING
			DIAGRAMS
			14
	PDIP±14		MC74HC14AN
	N SUFFIX
			AWLYYWW
	CASE 646
			1
			14
	SOIC±14		HC14A
	D SUFFIX
			AWLYWW
	CASE 751A
			1
			14
	TSSOP±14		HC
	DT SUFFIX		14A
	CASE 948G		ALYW
			1
	A	= Assembly Location
	WL or L = Wafer Lot
	YY or Y	= Year
	WW or W = Work Week
	FUNCTION TABLE
	Inputs	Outputs
	A		Y
	L		H
	H		L

Pinout: 14±Lead Packages (Top View)

VCC		A6		Y6		A5		Y5		A4		Y4
14		13		12		11		10		9		8

1		2		3		4		5		6		7
A1		Y1		A2		Y2		A3		Y3	GND

ORDERING INFORMATION

Device	Package	Shipping
MC74HC14AN	PDIP±14	2000 / Box
MC74HC14AD	SOIC±14	55 / Rail
MC74HC14ADR2	SOIC±14	2500 / Reel
MC74HC14ADT	TSSOP±14	96 / Rail
MC74HC14ADTR2	TSSOP±14	2500 / Reel

Semiconductor Components Industries, LLC, 2000	1	Publication Order Number:
March, 2000 ± Rev. 8		MC74HC14A/D

MC74HC14A

MAXIMUM RATINGS*

	Symbol	Parameter		Value	Unit
	VCC	DC Supply Voltage (Referenced to GND)		± 0.5 to + 7.0	V
	Vin	DC Input Voltage (Referenced to GND)		± 0.5 to VCC + 0.5	V
	Vout	DC Output Voltage (Referenced to GND)		± 0.5 to VCC + 0.5	V
	Iin	DC Input Current, per Pin		± 20	mA
	Iout	DC Output Current, per Pin		± 25	mA
	ICC	DC Supply Current, VCC and GND Pins		± 50	mA
	PD	Power Dissipation in Still Air,	Plastic DIP²	750	mW
			SOIC Package²	500
			TSSOP Package²	450
	Tstg	Storage Temperature Range		± 65 to + 150	_C
	TL	Lead Temperature, 1 mm from Case for 10 Seconds			_C
		Plastic DIP, SOIC or TSSOP Package		260

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the

range GND v (Vin or Vout) v VCC. Unused inputs must always be

tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

²Derating Ð Plastic DIP: ± 10 mW/ _C from 65_ to 125_C SOIC Package: ± 7 mW/_C from 65_ to 125_C

TSSOP Package: ± 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High±Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol		Parameter	Min	Max	Unit
VCC	DC Supply Voltage (Referenced to GND)		2.0	6.0	V
Vin, Vout	DC Input Voltage, Output Voltage (Referenced to		0	VCC	V
	GND)
TA	Operating Temperature Range, All Package Types		± 55	+ 125	_C
tr, tf	Input Rise/Fall Time	VCC = 2.0 V	0	No Limit*	ns
	(Figure 1)	VCC = 4.5 V	0	No Limit*
		VCC = 6.0 V	0	No Limit*

*When Vin = 50% VCC, ICC > 1mA

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MC74HC14A

DC CHARACTERISTICS (Voltages Referenced to GND)

				VCC	Guaranteed Limit
Symbol	Parameter	Condition		V	±55 to 25°C	≤85°C	≤125°C		Unit
VT+ max	Maximum Positive±Going Input	Vout = 0.1V		2.0	1.50	1.50		1.50	V
	Threshold Voltage	|Iout| ≤ 20μA		3.0	2.15	2.15		2.15
	(Figure 3)			4.5	3.15	3.15		3.15
				6.0	4.20	4.20		4.20
VT+ min	Minimum Positive±Going Input	Vout = 0.1V		2.0	1.0	0.95		0.95	V
	Threshold Voltage	|Iout| ≤ 20μA		3.0	1.5	1.45		1.45
	(Figure 3)			4.5	2.3	2.25		2.25
				6.0	3.0	2.95		2.95
VT± max	Maximum Negative±Going Input	Vout = VCC ± 0.1V		2.0	0.9	0.95		0.95	V
	Threshold Voltage	|Iout| ≤ 20μA		3.0	1.4	1.45		1.45
	(Figure 3)			4.5	2.0	2.05		2.05
				6.0	2.6	2.65		2.65
VT± min	Minimum Negative±Going Input	Vout = VCC ± 0.1V		2.0	0.3	0.3		0.3	V
	Threshold Voltage	|Iout| ≤ 20μA		3.0	0.5	0.5		0.5
	(Figure 3)			4.5	0.9	0.9		0.9
				6.0	1.2	1.2		1.2
VHmax	Maximum Hysteresis Voltage	Vout = 0.1V or VCC ± 0.1V		2.0	1.20	1.20		1.20	V
Note 2	(Figure 3)	|Iout| ≤ 20μA		3.0	1.65	1.65		1.65
				4.5	2.25	2.25		2.25
				6.0	3.00	3.00		3.00
VHmin	Minimum Hysteresis Voltage	Vout = 0.1V or VCC ± 0.1V		2.0	0.20	0.20		0.20	V
Note 2	(Figure 3)	|Iout| ≤ 20μA		3.0	0.25	0.25		0.25
				4.5	0.40	0.40		0.40
				6.0	0.50	0.50		0.50
VOH	Minimum High±Level Output	Vin ≤ VT± min		2.0	1.9	1.9		1.9	V
	Voltage	|Iout| ≤ 20μA		4.5	4.4	4.4		4.4
				6.0	5.9	5.9		5.9
		Vin ≤ VT± min	|Iout| ≤ 2.4mA	3.0	2.48	2.34		2.20
			|Iout| ≤ 4.0mA	4.5	3.98	3.84		3.70
			|Iout| ≤ 5.2mA	6.0	5.48	5.34		5.20
VOL	Maximum Low±Level Output	Vin ≥ VT+ max		2.0	0.1	0.1		0.1	V
	Voltage	|Iout| ≤ 20μA		4.5	0.1	0.1		0.1
				6.0	0.1	0.1		0.1
		Vin ≥ VT+ max	|Iout| ≤ 2.4mA	3.0	0.26	0.33		0.40
			|Iout| ≤ 4.0mA	4.5	0.26	0.33		0.40
			|Iout| ≤ 5.2mA	6.0	0.26	0.33		0.40
Iin	Maximum Input Leakage	Vin = VCC or GND		6.0	±0.1	±1.0		±1.0	μA
	Current
ICC	Maximum Quiescent Supply	Vin = VCC or GND		6.0	1.0	10		40	μA
	Current (per Package)	Iout = 0μA

1.Information on typical parametric values along with frequency or heavy load considerations can be found in Chapter 2 of the ON Semiconductor High±Speed CMOS Data Book (DL129/D).

2.VHmin > (VT+ min) ± (VT± max); VHmax = (VT+ max) ± (VT± min).

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