Motorola MC74ACT646DWR2, MC74ACT646DW, MC74AC646N, MC74AC646DW, MC74AC646DWR2 Datasheet

MC74AC646

MC74ACT646

	Octal Transceiver/Register with	OCTAL
	3!State Outputs (Non!inverting)	TRANSCEIVER/REGISTER
		WITH 3-STATE OUTPUTS
		(NON-INVERTING)

The MC74AC646/74ACT646 consist of registered bus transceiver circuits,

with outputs, D-type flip-flops and control circuitry providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data on the A or B bus will be loaded into the respective registers on the LOW-to-HIGH transition of the appropriate clock pin (CAB or CBA). The four fundamental data handling functions available are illustrated in the following figures.

	REAL TIME TRANSFER		REAL TIME TRANSFER		N SUFFIX
	A-BUS TO B-BUS		B-BUS TO A-BUS
					CASE 724-03
		A-BUS	A-BUS		PLASTIC
	REG	REG	REG	REG
		B-BUS	B-BUS

	Figure 1	Figure 2
			DW SUFFIX
	STORAGE	TRANSFER	CASE 751E-04
			SOIC PACKAGE
	FROM BUS TO REGISTER	FROM REGISTER TO BUS
	A-BUS	A-BUS

LOGIC SYMBOL

REG

REG

REG

REG

B-BUS

B-BUS

Figure 3

Figure 4

•Independent Registers for A and B Buses

•Multiplexed Real-Time and Stored Data Transfers

•Choice of True and Inverting Data Paths

•3-State Outputs

•300 mil Slim Dual In-Line Package

•Outputs Source/Sink 24 mA

•′ACT646 Has TTL Compatible Inputs

CAB A0 A1 A2 A3 A4 A5 A6 A7

SAB

DIR

CBA

SBA

G	B0	B1 B2 B3 B4	B5 B6 B7

FACT DATA

5-1

MC74AC646 MC74ACT646

FUNCTION TABLE

Inputs

Data I/O*

Operation or Function

G

DIR

CAB

CBA

SAB

SBA

A0±A7

B0±B7

H

X

H or L

H or L

X

X

Input

Input

Isolation

H

X

X

X

Store A and B Data

L

L

X

X

X

L

Output

Input

Real Time B Data to A Bus

L

L

X

X

X

H

Stored B Data to A Bus

L

H

X

X

L

X

Input

Output

Real Time A Data to B Bus

L

H

H or L

X

H

X

Stored A Data to B Bus

*The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled; i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

= LOW-to-HIGH Transition

CAB							VCC
	1				24
SAB							CBA
	2				23
DIR							SBA
	3				22
A0							G
	4				21
A1							B0
	5				20
A2							B1
	6				19
A3							B2
	7				18
A4							B3
	8				17
A5							B4
	9				16
A6							B5
	10				15
A7							B6
	11				14
GND							B7
	12				13

PIN NAMES
A0±A7	Data Register Inputs
	Data Register A Outputs
B0±B7	Data Register B Inputs
	Data Register B Outputs
CAB, CBA	Clock Pulse Inputs
SAB, SBA	Transmit/Receive Inputs
DIR, G	Output Enable Inputs

LOGIC DIAGRAM

G

DIR

CBA

SBA

CAB

SAB

1 OF 8 CHANNELS

D0

C0

A0 B0

D0 C0

TO 7 OTHER CHANNELS

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

FACT DATA

5-2

MC74AC646 MC74ACT646

MAXIMUM RATINGS*

Symbol	Parameter	Value	Unit
VCC	DC Supply Voltage (Referenced to GND)	±0.5 to +7.0	V
Vin	DC Input Voltage (Referenced to GND)	±0.5 to VCC +0.5	V
Vout	DC Output Voltage (Referenced to GND)	±0.5 to VCC +0.5	V
Iin	DC Input Current, per Pin	±20	mA
Iout	DC Output Sink/Source Current, per Pin	±50	mA
ICC	DC VCC or GND Current per Output Pin	±50	mA
Tstg	Storage Temperature	±65 to +150	°C

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

RECOMMENDED OPERATING CONDITIONS

	Symbol	Parameter		Min	Typ	Max	Unit
	VCC	Supply Voltage	′AC	2.0	5.0	6.0	V
			′ACT	4.5	5.0	5.5
	Vin, Vout	DC Input Voltage, Output Voltage (Ref. to GND)		0		VCC	V
		Input Rise and Fall Time (Note 1)	VCC @ 3.0 V		150
	tr, tf		VCC @ 4.5 V		40		ns/V
		′AC Devices except Schmitt Inputs
			VCC @ 5.5 V		25
	tr, tf	Input Rise and Fall Time (Note 2)	VCC @ 4.5 V		10		ns/V
		′ACT Devices except Schmitt Inputs	VCC @ 5.5 V		8.0
	TJ	Junction Temperature (PDIP)				140	°C
	TA	Operating Ambient Temperature Range		±40	25	85	°C
	IOH	Output Current Ð High				±24	mA
	IOL	Output Current Ð Low				24	mA

1.Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.

2.Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.

FACT DATA

5-3