MOTOROLA MC74HCT04ADT, MC74HCT04ADTR2, MC74HCT04ADR2, MC74HCT04AN, MC74HCT04AFL1 Datasheet

MC74HCT04A

Hex Inverter

With LSTTL±Compatible Inputs

High±Performance Silicon±Gate CMOS

The MC74HCT04A may be used as a level converter for interfacing TTL or NMOS outputs to High±Speed CMOS inputs.

The HCT04A is identical in pinout to the LS04.

•Output Drive Capability: 10 LSTTL Loads

•TTL/NMOS±Compatible Input Levels

•Outputs Directly Interface to CMOS, NMOS and TTL

•Operating Voltage Range: 4.5 to 5.5V

•Low Input Current: 1μA

•In Compliance With the JEDEC Standard No. 7A Requirements

•Chip Complexity: 48 FETs or 12 Equivalent Gates

		LOGIC DIAGRAM
1		2
A1			Y1
3		4	Y2
A2
5		6	Y3
A3
				Y =
					A
9		8	Y4	Pin 14 = VCC
A4
				Pin 7 = GND
11		10	Y5
A5
13		12	Y6
A6

Pinout: 14±Lead Packages (Top View)

VCC		A6		Y6		A5		Y5		A4		Y4
14		13		12		11		10		9		8

1		2		3		4		5		6		7
A1		Y1		A2		Y2		A3		Y3	GND

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			MARKING
			DIAGRAMS
			14
	PDIP±14		MC74HCT04AN
	N SUFFIX
			AWLYYWW
	CASE 646
			1
			14
	SOIC±14		HCT04A
	D SUFFIX
			AWLYWW
	CASE 751A
			1
			14
	TSSOP±14		HCT
	DT SUFFIX		04A
	CASE 948G		ALYW
			1
	A	= Assembly Location
	WL or L = Wafer Lot
	YY or Y	= Year
	WW or W = Work Week
	FUNCTION TABLE
	Inputs	Outputs
	A		Y
	L		H
	H		L

ORDERING INFORMATION

Device	Package	Shipping
MC74HCT04AN	PDIP±14	2000 / Box
MC74HCT04AD	SOIC±14	55 / Rail
MC74HCT04ADR2	SOIC±14	2500 / Reel
MC74HCT04ADT	TSSOP±14	96 / Rail
MC74HCT04ADTR2	TSSOP±14	2500 / Reel

Semiconductor Components Industries, LLC, 2000	1	Publication Order Number:
March, 2000 ± Rev. 7		MC74HCT04A/D

MC74HCT04A

MAXIMUM RATINGS*

	Symbol	Parameter		Value	Unit
	VCC	DC Supply Voltage (Referenced to GND)		± 0.5 to + 7.0	V
	Vin	DC Input Voltage (Referenced to GND)		± 0.5 to VCC + 0.5	V
	Vout	DC Output Voltage (Referenced to GND)		± 0.5 to VCC + 0.5	V
	Iin	DC Input Current, per Pin		± 20	mA
	Iout	DC Output Current, per Pin		± 25	mA
	ICC	DC Supply Current, VCC and GND Pins		± 50	mA
	PD	Power Dissipation in Still Air	Plastic DIP²	750	mW
			SOIC Package²	500
			TSSOP Package²	450
	Tstg	Storage Temperature Range		± 65 to + 150	_C
	TL	Lead Temperature, 1 mm from Case for 10 Seconds			_C
		Plastic DIP, SOIC or TSSOP Package		260

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the

range GND v (Vin or Vout) v VCC. Unused inputs must always be

tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

²Derating Ð Plastic DIP: ± 10 mW/ _C from 65_ to 125_C SOIC Package: ± 7 mW/_C from 65_ to 125_C

TSSOP Package: ± 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High±Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol	Parameter	Min	Max	Unit
VCC	DC Supply Voltage (Referenced to GND)	4.5	5.5	V
Vin, Vout	DC Input Voltage, Output Voltage (Referenced to GND)	0	VCC	V
TA	Operating Temperature Range, All Package Types	± 55	+ 125	_C
tr, tf	Input Rise/Fall Time (Figure 1)	0	500	ns

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MC74HCT04A

DC CHARACTERISTICS (Voltages Referenced to GND)

				VCC	Guaranteed Limit
Symbol	Parameter	Condition		V	±55 to 25°C		≤85°C		≤125°C	Unit
VIH	Minimum High±Level Input	Vout = 0.1V		4.5	2.0		2.0		2.0	V
	Voltage	|Iout| ≤ 20μA		5.5	2.0		2.0		2.0
VIL	Maximum Low±Level Input	Vout = VCC ± 0.1V		4.5	0.8		0.8		0.8	V
	Voltage	|Iout| ≤ 20μA		5.5	0.8		0.8		0.8
VOH	Minimum High±Level Output	Vin = VIL		4.5	4.4		4.4		4.4	V
	Voltage	|Iout| ≤ 20μA		5.5	5.4		5.4		5.4
		Vin = VIL	|Iout| ≤ 4.0mA	4.5	3.98		3.84		3.70
VOL	Maximum Low±Level Output	Vin = VIH		4.5	0.1		0.1		0.1	V
	Voltage	|Iout| ≤ 20μA		5.5	0.1		0.1		0.1
		Vin = VIH	|Iout| ≤ 4.0mA	4.5	0.26		0.33		0.40
Iin	Maximum Input Leakage	Vin = VCC or GND		5.5	±0.1		±1.0		±1.0	μA
	Current
ICC	Maximum Quiescent Supply	Vin = VCC or GND		5.5	1		10		40	μA
	Current (per Package)	Iout = 0μA
ICC	Additional Quiescent Supply	Vin = 2.4V, Any One Input			≥ ±55°C		25 to 125°C
	Current	Vin = VCC or GND, Other Inputs
		Iout = 0μA		5.5	2.9		2.4			mA

1.Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High±Speed CMOS Data Book (DL129/D).

2.Total Supply Current = ICC + ΣΔICC.

AC CHARACTERISTICS (VCC = 5.0V ±10%, CL = 50pF, Input tr = tf = 6ns)

		Guaranteed Limit
Symbol	Parameter	±55 to 25°C	≤85°C		≤125°C	Unit
tPLH,	Maximum Propagation Delay, Input A to Output Y	15	19		22	ns
tPHL	(Figures 1 and 2)	17	21		26
tTLH,	Maximum Output Transition Time, Any Output	15	19		22	ns
tTHL	(Figures 1 and 2)
Cin	Maximum Input Capacitance	10	10		10	pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High±Speed CMOS Data Book (DL129/D).

		Typical @ 25°C, VCC = 5.0 V
CPD	Power Dissipation Capacitance (Per Inverter)*	22	pF

*Used to determine the no±load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the ON Semiconductor High±Speed CMOS Data Book (DL129/D).

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