MOTOROLA MC74HCT273ADW, MC74HCT273ADWR2, MC74HCT273AH, MC74HCT273AN, MC74HCT273ADTR2 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Octal D Flip-Flop with	MC74HCT273A

	Common Clock and Reset
	with LSTTL-Compatible Inputs		N SUFFIX
	High±Performance Silicon±Gate CMOS	20	PLASTIC PACKAGE
			CASE 738±03

	The MC74HCT273A may be used as a level converter for interfacing TTL	1
	or NMOS outputs to High±Speed CMOS inputs.			DW SUFFIX
	The HCT273A is identical in pinout to the LS273.
		20		SOIC PACKAGE
	This device consists of eight D flip±flops with common Clock and Reset		1
				CASE 751D±04
	inputs. Each flip±flop is loaded with a low±to±high transition of the Clock
	input. Reset is asynchronous and active low.		ORDERING INFORMATION

	• Output Drive Capability: 10 LSTTL Loads	MC74HCTXXXAN	Plastic
	• TTL/NMOS Compatible Input Levels
		MC74HCTXXXADW	SOIC

•Outputs Directly Interface to CMOS, NMOS and TTL

•Operating Voltage Range: 4.5 to 5.5 V

•Low Input Current: 1.0 μA

•	In Compliance with the Requirements Defined by JEDEC Standard	PIN ASSIGNMENT
•	No. 7A	RESET			1	20	VCC
	Chip Complexity: 284 FETs or 71 Equivalent Gates
		Q0			2	19	Q7
		D0			3	18	D7
		D1			4	17	D6

			LOGIC DIAGRAM					Q1	5	16	Q6
			2					Q2	6	15	Q5
	D0	3		Q0				D2	7	14	D5
	D1	4	5	Q1				D3	8	13	D4
	D2	7	6	Q2				Q3	9	12	Q4
DATA	D3	8	9	Q3	NONINVERTING		GND		10	11	CLOCK
INPUTS		13	12
	D4			Q4	OUTPUTS
		14
	D5		15	Q5
	D6	17	16	Q6				FUNCTION TABLE
	D7	18
			19	Q7				Inputs			Output
		11
	CLOCK					Reset		Clock		D	Q
						L			X	X	L
						H				H	H
	RESET	1	PIN 20 = VCC			H				L	L
						H			L	X	No Change
			PIN 10 = GND
						H				X	No Change
						X = Don't Care
						Z = High Impedance

2/97

Motorola, Inc. 1997

1

REV 7

MC74HCT273A

MAXIMUM RATINGS*

Symbol	Parameter		Value	Unit
VCC	DC Supply Voltage (Referenced to GND)		± 0.5 to + 7.0	V
Vin	DC Input Voltage (Referenced to GND)		± 0.5 to VCC + 0.5	V
Vout	DC Output Voltage (Referenced to GND)		± 0.5 to VCC + 0.5	V
Iin	DC Input Current, per Pin		± 20	mA
Iout	DC Output Current, per Pin		± 25	mA
ICC	DC Supply Current, VCC and GND Pins		± 50	mA
PD	Power Dissipation in Still Air	Plastic DIP²	750	mW
	SOIC Package²		500
Tstg	Storage Temperature		± 65 to + 150	_C
TL	Lead Temperature, 1 mm from Case for 10 Seconds			_C
	(SOIC or Plastic DIP)		260

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the

range GND v (Vin or Vout) v VCC. Unused inputs must always be

tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

²Derating Ð Plastic DIP: ± 10 mW/ _C from 65_ to 125_C SOIC Package: ± 7 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol	Parameter	Min	Max	Unit
VCC	DC Supply Voltage (Referenced to GND)	4.5	5.5	V
Vin, Vout	DC Input Voltage, Output Voltage (Referenced to GND)	0	VCC	V
TA	Operating Temperature, All Package Types	± 55	+ 125	_C
tr, tf	Input Rise and Fall Time (Figure 1)	0	500	ns

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

				Guaranteed Limit
			VCC
				± 55 to
Symbol	Parameter	Test Conditions	V	25_C	v 85_C	v 125_C		Unit
VIH	Minimum High±Level Input	Vout = 0.1 V or VCC ± 0.1 V	4.5	2.0	2.0		2.0	V
	Voltage	|Iout| v 20 μA	5.5	2.0	2.0		2.0
VIL	Maximum Low±Level Input	Vout = 0.1 V or VCC ± 0.1 V	4.5	0.8	0.8		0.8	V
	Voltage	|Iout| v 20 μA	5.5	0.8	0.8		0.8
VOH	Minimum High±Level Output	Vin = VIH or VIL	4.5	4.4	4.4		4.4	V
	Voltage	|Iout| v 20 μA	5.5	5.4	5.4		5.4
		Vin = VIH or VIL
		|Iout| v 4.0 mA	4.5	3.98	3.84		3.7
VOL	Maximum Low±Level Output	Vin = VIH or VIL	4.5	0.1	0.1		0.1	V
	Voltage	|Iout| v 20 μA	5.5	0.1	0.1		0.1
		Vin = VIH or VIL
		|Iout| v 4.0 mA	4.5	0.26	0.33		0.4
Iin	Maximum Input Leakage Current	Vin = VCC or GND	5.5	± 0.1	± 1.0		± 1.0	μA
ICC	Maximum Quiescent Supply	Vin = VCC or GND	5.5	4.0	40		160	μA
	Current (per Package)	Iout = 0 μA
ICC	Additional Quiescent Supply	Vin = 2.4 V, Any One Input		≥ ±55_C	25_C to 125_C
	Current	Vin = VCC or GND, Other Inputs
		lout = 0 μA	5.5	2.9	2.4			mA

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

MOTOROLA	2	High±Speed CMOS Logic Data
		DL129 Ð Rev 6