MOTOROLA MC74HC4316ND, MC74HC4316D, MC74HC4316ADW, MC74HC4316ADWR2, MC74HC4316ADTR2 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Quad Analog Switch/ Multiplexer/Demultiplexer with Separate Analog and Digital Power Supplies

High±Performance Silicon±Gate CMOS

The MC74HC4316 utilizes silicon±gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF±channel leakage current. This bilateral switch/multiplexer/demultiplexer controls analog and digital voltages that may vary across the full analog power±supply range

(from VCC to VEE).

The HC4316 is similar in function to the metal±gate CMOS MC14016 and MC14066, and to the High±Speed CMOS HC4016 and HC4066. Each device has four independent switches. The device control and Enable inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The device has been designed so that the ON resistances (RON) are much more linear over input voltage than RON of metal±gate CMOS analog switches. Logic±level translators are provided so that the On/Off Control and Enable logic±level voltages need only be VCC and GND, while the switch is passing signals ranging between VCC and VEE. When the Enable pin (active±low) is high, all four analog switches are turned off.

•Logic±Level Translator for On/Off Control and Enable Inputs

•Fast Switching and Propagation Speeds

•High ON/OFF Output Voltage Ratio

•Diode Protection on All Inputs/Outputs

•Analog Power±Supply Voltage Range (VCC ± VEE) = 2.0 to 12.0 Volts

•Digital (Control) Power±Supply Voltage Range (VCC ± GND) = 2.0 to 6.0 Volts, Independent of VEE

•Improved Linearity of ON Resistance

•Chip Complexity: 66 FETs or 16.5 Equivalent Gates

LOGIC DIAGRAM

X	1	ANALOG	2	Y
A		SWITCH		A
A ON/OFF CONTROL 15		LEVEL
		TRANSLATOR
X	4	ANALOG	3	Y
B		SWITCH		B
B ON/OFF CONTROL	5	LEVEL			ANALOG
		TRANSLATOR			OUTPUTS/INPUTS
X	10	ANALOG	11	Y
C		SWITCH		C	PIN 16 = VCC
C ON/OFF CONTROL	6	LEVEL			PIN 8 = GND
		TRANSLATOR			PIN 9 = VEE
					GND ≥ VEE
	13	ANALOG	12
X				Y
D		SWITCH		D
D ON/OFF CONTROL 14		LEVEL
ENABLE	7	TRANSLATOR
		ANALOG INPUTS/OUTPUTS = XA, XB, XC, XD

MC74HC4316

		N SUFFIX
	16	PLASTIC PACKAGE
		CASE 648±08
		1

	D SUFFIX
16	SOIC PACKAGE
1	CASE 751B±05
ORDERING INFORMATION
MC74HCXXXXN	Plastic
MC74HCXXXXD	SOIC

PIN ASSIGNMENT

XA		1	16	VCC
YA		2	15	A ON/OFF
				CONTROL
YB		3	14	D ON/OFF
				CONTROL
XB		4	13	XD
B ON/OFF		5	12	YD
CONTROL
C ON/OFF		6	11	YC
CONTROL
ENABLE		7	10	XC
GND		8	9	VEE

FUNCTION TABLE

Inputs		State of
	On/Off	Analog
Enable	Control	Switch
L	H	On
L	L	Off
H	X	Off

X = don't care

10/95

Motorola, Inc. 1995

REV 6

MC74HC4316

MAXIMUM RATINGS*

	Symbol	Parameter		Value	Unit
	VCC	Positive DC Supply Voltage	(Ref. to GND)	± 0.5 to + 7.0	V
			(Ref. to VEE)	± 0.5 to + 14.0
	VEE	Negative DC Supply Voltage (Ref. to GND)		± 7.0 to + 0.5	V
	VIS	Analog Input Voltage		VEE ± 0.5	V
				to VCC + 0.5
	Vin	DC Input Voltage (Ref. to GND)		± 1.5 to VCC + 1.5	V
	I	DC Current Into or Out of Any Pin		± 25	mA
	PD	Power Dissipation in Still Air	Plastic DIP²	750	mW
			SOIC Package²	500
	Tstg	Storage Temperature		± 65 to + 150	_C
	TL	Lead Temperature, 1 mm from Case for 10 Seconds			_C
		(Plastic DIP or SOIC Package)		260

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and Vout should be constrained to the

range GND v (Vin or Vout) v VCC. Unused inputs must always be

tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. I/O pins must be connected to a properly terminated line or bus.

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

²Derating Ð Plastic DIP: ± 10 mW/ _C from 65_ to 125_C SOIC Package: ± 7 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol	Parameter		Min	Max	Unit
VCC	Positive DC Supply Voltage (Ref. to GND)		2.0	6.0	V
VEE	Negative DC Supply Voltage (Ref. to GND)		± 6.0	GND	V
VIS	Analog Input Voltage		VEE	VCC	V
Vin	Digital Input Voltage (Ref. to GND)		GND	VCC	V
VIO*	Static or Dynamic Voltage Across Switch		Ð	1.2	V
TA	Operating Temperature, All Package Types		± 55	+ 125	_C
tr, tf	Input Rise and Fall Time	VCC = 2.0 V	0	1000	ns
	(Control or Enable Inputs)	VCC = 4.5 V	0	500
	(Figure 10)	VCC = 6.0 V	0	400

*For voltage drops across the switch greater than 1.2 V (switch on), excessive VCC current may be drawn; i.e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

DC ELECTRICAL CHARACTERISTICS Digital Section (Voltages Referenced to GND) VEE = GND Except Where Noted

					Guaranteed Limit
				VCC
					± 55 to
Symbol	Parameter	Test Conditions		V	25_C	v 85_C	v 125_C	Unit
VIH	Minimum High±Level Voltage,	Ron = Per Spec		2.0	1.5	1.5	1.5	V
	Control or Enable Inputs			4.5	3.15	3.15	3.15
				6.0	4.2	4.2	4.2
VIL	Maximum Low±Level Voltage,	Ron = Per Spec		2.0	0.3	0.3	0.3	V
	Control or Enable Inputs			4.5	0.9	0.9	0.9
				6.0	1.2	1.2	1.2
Iin	Maximum Input Leakage	Vin = VCC or GND		6.0	± 0.1	± 1.0	± 1.0	μA
	Current, Control or Enable	VEE = ± 6.0 V
	Inputs
ICC	Maximum Quiescent Supply	Vin = VCC or GND						μA
	Current (per Package)	VIO = 0 V	VEE = GND	6.0	2	20	40
			VEE = ± 6.0	6.0	8	80	160

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

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MC74HC4316

DC ELECTRICAL CHARACTERISTICS Analog Section (Voltages Referenced to VEE)

					Guaranteed Limit
			VCC	VEE
					± 55 to
Symbol	Parameter	Test Conditions	V	V	25_C	v 85_C	v 125_C	Unit
Ron	Maximum ªONº Resistance	Vin = VIH	2.0*	0.0	Ð	Ð	Ð	Ω
		VIS = VCC to VEE	4 5	0.0	210	230	250
		IS v 2.0 mA (Figures 1, 2)	4.5	± 4.5	95	105	110
			6.0	± 6.0	75	85	90
		Vin = VIH	2.0	0.0	Ð	Ð	Ð
		VIS = VCC or VEE (Endpoints)	4.5	0.0	100	110	130
		IS v 2.0 mA (Figures 1, 2)	4.5	± 4.5	80	90	100
			6.0	± 6.0	70	80	90
Ron	Maximum Difference in ªONº	Vin = VIH	2.0	0.0	Ð	Ð	Ð	Ω
	Resistance Between Any Two	VIS = 1/2 (VCC ± VEE)	4.5	0.0	20	30	40
	Channels in the Same Package	IS v 2.0 mA	4.5	± 4.5	15	25	30
			6.0	± 6.0	10	20	25
Ioff	Maximum Off±Channel Leakage	Vin = VIL	6.0	± 6.0	0.1	0.5	1.0	μA
	Current, Any One Channel	VIO = VCC or VEE
		Switch Off (Figure 3)
Ion	Maximum On±Channel Leakage	Vin = VIH	6.0	± 6.0	0.1	0.5	1.0	μA
	Current, Any One Channel	VIS = VCC or VEE
		(Figure 4)

*At supply voltage (VCC ± VEE) approaching 2 V the analog switch±on resistance becomes extremely non±linear. Therefore, for low±voltage operation, it is recommended that these devices only be used to control digital signals.

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Control or Enable tr = tf = 6 ns, VEE = GND)

				Guaranteed Limit
			VCC
				± 55 to
Symbol		Parameter	V	25_C	v 85_C	v 125_C		Unit
tPLH,	Maximum Propagation Delay, Analog Input to Analog Output		2.0	50	75	90		ns
tPHL	(Figures 8 and 9)		4.5	10	15	18
			6.0	10	13	15
tPLZ,	Maximum Propagation Delay, Control or Enable to Analog Output		2.0	250	312	375		ns
tPHZ	(Figures 10 and 11)		4.5	50	63	75
			6.0	43	54	64
tPZL,	Maximum Propagation Delay, Control or Enable to Analog Output		2.0	185	220	265		ns
tPZH	(Figures 10 and 11)		4.5	53	66	75
			6.0	45	56	68
C	Maximum Capacitance	ON/OFF Control	Ð	10	10	10		pF
		and Enable Inputs
		Control Input = GND
		Analog I/O	Ð	35	35	35
		Feedthrough	Ð	1.0	1.0	1.0
NOTES:
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).
				Typical @ 25°C, VCC = 5.0 V
CPD	Power Dissipation Capacitance (Per Switch) (Figure 13)*				15			pF

* Used to determine the no±load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

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