Octal D Type Flip Flop with 3 State Outputs
The MC74AC574/74ACT574 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition.
The MC74AC574/74ACT574 is functionally identical to the MC74AC374/ 74ACT374 except for the pinouts.
•Inputs and Outputs on Opposite Sides of Package Allowing Easy Interface with Microprocessors
•Useful as Input or Output Port for Microprocessors
•Functionally Identical to MC74AC374/74ACT374
•3-State Outputs for Bus-Oriented Applications
•Outputs Source/Sink 24 mA
•′ACT574 Has TTL Compatible Inputs
VCC |
O0 |
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O1 |
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O2 |
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O3 |
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O4 |
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O5 |
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O6 |
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O7 |
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CP |
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D0 |
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D1 |
D2 |
D3 |
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D4 |
D5 |
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D6 |
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D7 |
GND |
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OE |
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PIN NAMES |
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D0±D7 |
Data Inputs |
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CP |
Clock Pulse Input |
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OE |
3-State Output Enable Input |
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O0±O7 |
3-State Outputs |
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MC74AC57
MC74ACT574
OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
N SUFFIX
CASE 738-03
PLASTIC
DW SUFFIX
CASE 751D-04
PLASTIC
LOGIC SYMBOL
D0 D1 D2 D3 D4 D5 D6 D7 CP
OE
O0 O1 O2 O3 O4 O5 O6 O7
FACT DATA
5-1
MC74AC57 MC74ACT574
FUNCTIONAL DESCRIPTION
The MC74AC574/74ACT574 consists of eight edgetriggered flip-flops with individual D-type inputs and 3-state true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops.
FUNCTION TABLE
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Inputs |
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Internal |
Outputs |
Function |
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OE |
CP |
D |
Q |
On |
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H |
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H |
L |
NC |
Z |
Hold |
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H |
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H |
H |
NC |
Z |
Hold |
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H |
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L |
L |
Z |
Load |
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H |
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H |
H |
Z |
Load |
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L |
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L |
L |
L |
Data Available |
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L |
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H |
H |
H |
Data Available |
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L |
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H |
L |
NC |
NC |
No Change in Data |
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L |
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H |
H |
NC |
NC |
No Change in Data |
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H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Clock Transition
NC = No Change
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LOGIC DIAGRAM |
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D0 |
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D1 |
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D2 |
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D3 |
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D4 |
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D5 |
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D6 |
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D7 |
CP |
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C |
D |
C |
D |
C |
D |
C |
D |
C |
D |
C |
D |
C |
D |
C |
D |
Q |
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Q |
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Q |
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Q |
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Q |
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Q |
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Q |
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Q |
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OE |
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O0 |
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O1 |
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O2 |
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O3 |
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O4 |
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O5 |
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O6 |
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O7 |
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Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
FACT DATA
5-2
MC74AC57 MC74ACT574
MAXIMUM RATINGS*
Symbol |
Parameter |
Value |
Unit |
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VCC |
DC Supply Voltage (Referenced to GND) |
±0.5 to +7.0 |
V |
Vin |
DC Input Voltage (Referenced to GND) |
±0.5 to VCC +0.5 |
V |
Vout |
DC Output Voltage (Referenced to GND) |
±0.5 to VCC +0.5 |
V |
Iin |
DC Input Current, per Pin |
±20 |
mA |
Iout |
DC Output Sink/Source Current, per Pin |
±50 |
mA |
ICC |
DC VCC or GND Current per Output Pin |
±50 |
mA |
Tstg |
Storage Temperature |
±65 to +150 |
°C |
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol |
Parameter |
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Min |
Typ |
Max |
Unit |
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VCC |
Supply Voltage |
′AC |
2.0 |
5.0 |
6.0 |
V |
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′ACT |
4.5 |
5.0 |
5.5 |
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Vin, Vout |
DC Input Voltage, Output Voltage (Ref. to GND) |
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0 |
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VCC |
V |
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Input Rise and Fall Time (Note 1) |
VCC @ 3.0 V |
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150 |
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tr, tf |
VCC @ 4.5 V |
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40 |
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ns/V |
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′AC Devices except Schmitt Inputs |
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VCC @ 5.5 V |
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25 |
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tr, tf |
Input Rise and Fall Time (Note 2) |
VCC @ 4.5 V |
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10 |
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ns/V |
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′ACT Devices except Schmitt Inputs |
VCC @ 5.5 V |
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8.0 |
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TJ |
Junction Temperature (PDIP) |
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140 |
°C |
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TA |
Operating Ambient Temperature Range |
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±40 |
25 |
85 |
°C |
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IOH |
Output Current Ð High |
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±24 |
mA |
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IOL |
Output Current Ð Low |
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24 |
mA |
1.Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2.Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
FACT DATA
5-3