MOTOROLA MC74ACT74DR2, MC74ACT74DT, MC74ACT74DTEL, MC74ACT74DTR2, MC74ACT74M Datasheet

Dual D Type Positive Edge Triggered Flip Flop

The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering

occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

Asynchronous Inputs:

LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW level Clear and Set are independent of clock

Simultaneous LOW on CD and SD makes both Q and Q HIGH

•Outputs Source/Sink 24 mA

•′ACT74 Has TTL Compatible Inputs

VCC CD2

D2

CP2

SD2

Q2

Q2

14

13

12

11

10

9

8

CD1

SD2

D1

Q1

CP2

Q2

PIN NAMES

CP1 SD1 Q1

D2 CD2 Q2

D1, D2

Data Inputs

CP1,

CP2

Clock Pulse Inputs

C

D1,

C

D2

Direct Clear Inputs

1

2

3

4

5

6

7

SD1

, SD2

Direct Set Inputs

CD1

D1

CP1

SD1

Q1

Q1

GND

Q1, Q1, Q2, Q2

Outputs

TRUTH TABLE (Each Half)

Inputs

Outputs

SD

CD

CP

D

Q

Q

L

H

X

X

H

L

H

L

X

X

L

H

L

L

X

X

H

H

H

H

H

H

L

H

H

L

L

H

H

H

L

X

Q0

Q0

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

= LOW-to-HIGH Clock Transition

Q0(Q0) = Previous Q(Q) before

LOW-to-HIGH Transition of Clock

MC74AC74

MC74ACT74

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

N SUFFIX

CASE 646-06

PLASTIC

D SUFFIX

CASE 751A-03

PLASTIC

LOGIC SYMBOL

	Q1			Q1
	SD1				CD1
	D1		CP1

		Q2		Q2
	SD2				CD2
	D2		CP2

FACT DATA

5-1

MC74AC74 MC74ACT74

LOGIC DIAGRAM

SD

D Q

CP

Q

CD

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

MAXIMUM RATINGS*

Symbol	Parameter	Value	Unit
VCC	DC Supply Voltage (Referenced to GND)	±0.5 to +7.0	V
Vin	DC Input Voltage (Referenced to GND)	±0.5 to VCC +0.5	V
Vout	DC Output Voltage (Referenced to GND)	±0.5 to VCC +0.5	V
Iin	DC Input Current, per Pin	±20	mA
Iout	DC Output Sink/Source Current, per Pin	±50	mA
ICC	DC VCC or GND Current per Output Pin	±50	mA
Tstg	Storage Temperature	±65 to +150	°C

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

RECOMMENDED OPERATING CONDITIONS

	Symbol	Parameter		Min	Typ	Max	Unit
	VCC	Supply Voltage	′AC	2.0	5.0	6.0	V
			′ACT	4.5	5.0	5.5
	Vin, Vout	DC Input Voltage, Output Voltage (Ref. to GND)		0		VCC	V
		Input Rise and Fall Time (Note 1)	VCC @ 3.0 V		150
	tr, tf		VCC @ 4.5 V		40		ns/V
		′AC Devices except Schmitt Inputs
			VCC @ 5.5 V		25
	tr, tf	Input Rise and Fall Time (Note 2)	VCC @ 4.5 V		10		ns/V
		′ACT Devices except Schmitt Inputs	VCC @ 5.5 V		8.0
	TJ	Junction Temperature (PDIP)				140	°C
	TA	Operating Ambient Temperature Range		±40	25	85	°C
	IOH	Output Current Ð High				±24	mA
	IOL	Output Current Ð Low				24	mA

1.Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.

2.Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.

FACT DATA

5-2