February 1990
Revised August 2000
100314
Low Power Quint Differential Line Receiver
General Description
The 100314 is a monolithic quint differential line receiver with emitter-follower outputs. An internal reference supply (VBB) is available for single-ended reception. When used in single-ended operation the apparent input threshold of the true inputs is 25 mV to 30 mV higher (positive) than the threshold of the complementary inputs. Unlike other F100K ECL devices, the inputs do not have input pull-down resistors.
Active current sources provide common-mode rejection of 1.0V in either the positive or negative direction. A defined output state exists if both inverting and non-inverting inputs are at the same potential between VEE and VCC. The
defined state is logic HIGH on the Oa–Oe outputs.
Features
■35% power reduction of the 100114
■2000V ESD protection
■Pin/function compatible with 100114
■Voltage compensated operating range = − 4.2V to − 5.7V
■Available to industrial grade temperature range (PLCC package only)
Ordering Code:
Order Number |
Package Number |
Package Description |
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100314SC |
M24B |
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide |
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100314PC |
N24E |
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide |
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100314QC |
V28A |
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square |
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100314QI |
V28A |
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square |
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Industrial Temperature Range (− 40° C to + 85° C) |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol |
Connection Diagrams |
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24-Pin DIP/SOIC |
28-Pin PLCC
Pin Descriptions
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Pin Names |
Description |
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Da–De |
Data Inputs |
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D |
a–D |
e |
Inverting Data Inputs |
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Oa–Oe |
Data Outputs |
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e |
Complementary Data Outputs |
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O |
a–O |
Receiver Line Differential Quint Power Low 100314
© 2000 Fairchild Semiconductor Corporation |
DS010260 |
www.fairchildsemi.com |
100314
Absolute Maximum Ratings(Note 1)
Storage Temperature (TSTG) |
− 65° C to + 150° C |
Maximum Junction Temperature (TJ) |
+ 150° C |
Pin Potential to Ground Pin (VEE) |
− 7.0V to + 0.5V |
Input Voltage (DC) |
VEE to + 0.5V |
Output Current (DC Output HIGH) |
− 50 mA |
ESD (Note 2) |
≥ 2000V |
Recommended Operating
Conditions
Case Temperature (TC) |
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Commercial |
0° C to + 85° C |
Industrial |
− 40° C to + 85° C |
Supply Voltage (VEE) |
− 5.7V to − 4.2V |
Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version
DC Electrical Characteristics (Note 3)
VEE = − 4.2V to − 5.7V, VCC = VCCA = |
GND, TC = 0° C to + |
85° C |
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Symbol |
Parameter |
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Min |
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Typ |
Max |
Units |
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Conditions |
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VOH |
Output HIGH Voltage |
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− 1025 |
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− 955 |
− 870 |
mV |
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VIN = |
VIH (Max) |
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Loading with |
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VOL |
Output LOW Voltage |
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− 1830 |
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− 1705 |
− 1620 |
mV |
or VIL (Min) |
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50Ω |
to − 2.0V |
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VOHC |
Output HIGH Voltage |
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− 1035 |
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mV |
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VIN = |
VIH |
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Loading with |
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VOLC |
Output LOW Voltage |
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− 1610 |
mV |
or VIL (Max) |
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50Ω |
to − 2.0V |
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VBB |
Output Reference Voltage |
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− 1380 |
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− 1320 |
− 1260 |
mV |
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IVBB = |
− |
250 µ A |
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VDIFF |
Input Voltage Differential |
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150 |
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mV |
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Required for Full Output Swing |
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VCM |
Common Mode Voltage |
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VCC − 2.0 |
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VCC − 0.5 |
V |
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VIH |
Single-Ended |
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Guaranteed HIGH Signal for All |
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Input HIGH Voltage |
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− 1110 |
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− 870 |
mV |
Inputs (with one input tied to VBB) |
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VBB (Max) + VDIFF |
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VIL |
Single-Ended |
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Guaranteed LOW Signal for All |
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Input LOW Voltage |
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− 1830 |
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− 1530 |
mV |
Inputs (with one input tied to VBB) |
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VBB (Min) − VDIFF |
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IIL |
Input LOW Current |
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0.50 |
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µ A |
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VIN = |
VIL (Min) |
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IIH |
Input HIGH Current |
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240 |
µ A |
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VIN = |
VIH (Max), Da–De = |
VBB, |
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e = |
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D |
a–D |
VIL(Min) |
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ICBO |
Input Leakage Current |
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− 10 |
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µ A |
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VIN = |
VEE, Da–De = VBB, |
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e = |
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D |
a–D |
VIL (Min) |
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− 60 |
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− 30 |
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Da–De = |
VBB, |
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e = |
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IEE |
Power Supply Current |
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mA |
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D |
a–D |
VIL (Min) |
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Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions.
www.fairchildsemi.com |
2 |
Commercial Version (Continued)
DIP AC Electrical Characteristics
VEE = − 4.2V to − 5.7V, VCC = VCCA = GND
Symbol |
Parameter |
TC = 0° C |
TC = + 25° C |
TC = + 85° C |
Units |
Conditions |
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Min |
Max |
Min |
Max |
Min |
Max |
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fMAXFS |
Toggle Frequency |
250 |
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250 |
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250 |
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MHz |
(Note 2) |
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(Full Swing) |
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fMAXRS |
Toggle Frequency |
700 |
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700 |
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700 |
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MHz |
(Note 3) |
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(Reduced Swing) |
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tPLH |
Propagation Delay |
0.65 |
1.90 |
0.65 |
2.00 |
0.70 |
2.00 |
ns |
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tPHL |
Data to Output |
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Figures 1, 2 |
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tTLH |
Transition Time |
0.35 |
1.20 |
0.35 |
1.20 |
0.35 |
1.20 |
ns |
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tTHL |
20% to 80%, 80% to 20% |
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SOIC and PLCC AC Electrical Characteristics
VEE = − 4.2V to − 5.7V, VCC = VCCA = GND
Symbol |
Parameter |
TC = 0° C |
TC = + 25° C |
TC = + 85° C |
Units |
Conditions |
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Min |
Max |
Min |
Max |
Min |
Max |
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fMAXFS |
Toggle Frequency |
250 |
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250 |
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250 |
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MHz |
(Note 4) |
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(Full Swing) |
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fMAXRS |
Toggle Frequency |
700 |
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700 |
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700 |
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MHz |
(Note 5) |
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(Reduced Swing) |
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tPLH |
Propagation Delay |
0.65 |
1.70 |
0.65 |
1.80 |
0.70 |
1.80 |
ns |
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tPHL |
Data to Output |
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Figures 1, 2 |
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tTLH |
Transition Time |
0.35 |
1.10 |
0.35 |
1.10 |
0.35 |
1.10 |
ns |
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tTHL |
20% to 80%, 80% to 20% |
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tPLH |
Propagation Delay |
0.70 |
1.50 |
0.80 |
1.60 |
0.90 |
1.80 |
ns |
PLCC only |
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tPHL |
Data to Output |
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tOSHL |
Maximum Skew Common Edge |
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PLCC only |
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Output-to-Output Variation |
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280 |
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280 |
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280 |
ps |
(Note 6)(Note 7) |
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Data to Output Path |
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tOSLH |
Maximum Skew Common Edge |
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PLCC only |
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Output-to-Output Variation |
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330 |
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330 |
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330 |
ps |
(Note 6)(Note 7) |
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Data to Output Path |
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tOST |
Maximum Skew Opposite Edge |
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PLCC only |
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Output-to-Output Variation |
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330 |
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330 |
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330 |
ps |
(Note 6)(Note 7) |
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Data to Output Path |
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tPS |
Maximum Skew |
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PLCC only |
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Pin (Signal) Transition Variation |
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320 |
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320 |
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320 |
ps |
(Note 6)(Note 7) |
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Data to Output Path |
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Note 4: Maximum toggle frequency at which VOH and VOL DC specifications are maintained.
Note 5: Maximum toggle frequency at which outputs maintain 150 mV swing.
Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design.
Note 7: All skews calculated using input crossing point to output crossing point propagation delays.
100314
3 |
www.fairchildsemi.com |