October 1991
Revised November 1999
100310
Low Skew 2:8 Differential Clock Driver
General Description
The 100310 is a low skew 8-bit differential clock driver which is designed to select between two separate differential clock inputs. The low output to output skew (< 50 ps) is maintained for either clock input. A LOW on the select pin (SEL) selects CLKINA, CLKINA and a HIGH on the SEL pin selects the CLKINB, CLKINB inputs.
The 100310 is ideal for those applications that need the ability to freely select between two clocks, or to maintain the ability to switch to an alternate or backup clock should a problem arise with the primary clock source.
A VBB output is provided for single-ended operation.
Features
■Low output to output skew
■Differential inputs and outputs
■Allows multiplexing between two clock inputs
■Voltage compensated operating range: − 4.2V to − 5.7V
■Available to industrial grade temperature range (PLCC package only)
Ordering Code:
Order Number |
Package Number |
Package Description |
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100310QC |
V28A |
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square |
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100310QI |
V28A |
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square |
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Industrial Temperature Range (− 40° C to + 85° C) |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol |
Connection Diagram |
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28-Pin PLCC |
Pin Descriptions
Pin Names |
Description |
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CLKINn, |
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n |
Differential Clock Inputs |
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CLKIN |
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SEL |
Select |
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CLK0–7, |
CLK |
0–8 |
Differential Clock Outputs |
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VBB |
VBB Output |
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NC |
No Connect |
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Truth Table
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CLKn |
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CLKINA CLKINA CLKINB CLKINB SEL |
CLKn |
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H |
L |
X |
X |
L |
H |
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L |
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L |
H |
X |
X |
L |
L |
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H |
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X |
X |
H |
L |
H |
H |
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L |
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X |
X |
L |
H |
H |
L |
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H |
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Driver Clock Differential 2:8 Skew Low 100310
© 1999 Fairchild Semiconductor Corporation |
DS010943 |
www.fairchildsemi.com |
100310
Absolute Maximum Ratings(Note 1)
Storage Temperature (TSTG) |
− 65° C to + 150° C |
Maximum Junction Temperature (TJ) |
+ 150° C |
Pin Potential to Ground Pin (VEE) |
− 7.0V to + 0.5V |
Input Voltage (DC) |
VEE to + 0.5V |
Output Current (DC Output HIGH) |
− 50 mA |
ESD (Note 2) |
≥ 2000V |
Recommended Operating
Conditions
Case Temperature (TC) |
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Commercial |
0° C to + 85° C |
Industrial |
− 40° C to + 85° C |
Supply Voltage (VEE) |
− 5.7V to − 4.2V |
Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version
DC Electrical Characteristics (Note 3)
VEE = − 4.2V to − 5.7V, VCC = VCCA = |
GND, TC = 0° C to + 85° C |
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Symbol |
Parameter |
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Min |
Typ |
Max |
Units |
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Conditions |
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VOH |
Output HIGH Voltage |
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− 1025 |
− 955 |
− 870 |
mV |
VIN = |
VIH (Max) |
Loading with |
VOL |
Output LOW Voltage |
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− 1830 |
− 1705 |
− 1620 |
mV |
or VIL (Min) |
50Ω to − 2.0V |
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VOHC |
Output HIGH Voltage |
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− 1035 |
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mV |
VIN = |
VIH |
Loading with |
VOLC |
Output LOW Voltage |
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− 1610 |
mV |
or VIL (Max) |
50Ω to − 2.0V |
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VBB |
Output Reference Voltage |
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− 1380 |
− 1320 |
− 1260 |
mV |
IVBB = |
− 250 µ A |
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VDIFF |
Input Voltage Differential |
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150 |
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mV |
Required for Full Output Swing |
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VCM |
Common Mode Voltage |
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VCC − 2.0 |
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VCC − 0.5 |
V |
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VIH |
Input HIGH Voltage |
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− 1165 |
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− 870 |
mV |
Guaranteed HIGH Signal for All Inputs |
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VIL |
Input LOW Voltage |
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− 1830 |
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− 1475 |
mV |
Guaranteed LOW Signal for All Inputs |
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IIL |
Input LOW Current |
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0.50 |
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µ A |
VIN = |
VIL (Min) |
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IIH |
Input HIGH Current |
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240 |
µ A |
VIN = |
VIH (Max) |
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ICBO |
Input Leakage Current |
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− 10 |
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µ A |
VIN = |
VEE |
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IEE |
Power Supply Current |
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− 100 |
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− 40 |
mA |
Inputs Open |
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Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions.
www.fairchildsemi.com |
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