October 1987
Revised January 1999
MM74C174
Hex D-Type Flip-Flop
General Description
The MM74C174 hex D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. All have a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clear is independent of clock and accomplished by a low level at the clear input. All inputs are protected by diodes to VCC and GND.
Features
■Wide supply voltage range: 3.0V to 15V
■Guaranteed noise margin: 1.0V
■High noise immunity: 0.45 VCC (typ.)
■Low power TTL compatibility:
Fan out of 2 driving 74L
Ordering Code:
Order Number |
Package Number |
Package Description |
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MM74C174M |
M16A |
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow |
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MM74C174N |
N16E |
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram |
Truth Table |
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Pin Assignments for DIP and SOIC |
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Inputs |
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Output |
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Clear |
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Clock |
D |
Q |
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L |
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X |
X |
L |
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H |
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− |
H |
H |
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H |
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− |
L |
L |
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H |
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L |
X |
Q |
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Top View
Flop-Flip Type-D Hex MM74C174
© 1999 Fairchild Semiconductor Corporation |
DS005899.prf |
www.fairchildsemi.com |
MM74C174
Logic Diagrams
www.fairchildsemi.com |
2 |
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