October 1987
Revised January 1999
MM74C00 • MM74C02 • MM74C04
Quad 2-Input NAND Gate •
Quad 2-Input NOR Gate •
Hex Inverter
General Description
The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled rise and fall times. With features such as this the 74C logic family is close to ideal for use in digital systems. Function and pin out compatibility with series 74 devices minimizes design time for those designers already familiar with the standard 74 logic family.
All inputs are protected from damage due to static discharge by diode clamps to VCC and GND.
Features
■Wide supply voltage range: 3V to 15V
■Guaranteed noise margin: 1V
■High noise immunity: 0.45 VCC (typ.)
■Low power consumption: 10 nW/package (typ.)
■Low power: TTL compatibility: Fan out of 2 driving 74L
Ordering Code:
Order Number |
Package Number |
Package Description |
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MM74C00M |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow |
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MM74C00N |
N14A |
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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MM74C02N |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow |
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MM74C04M |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow |
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MM74C04N |
N14A |
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide |
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Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP and SOIC
MM74C00 |
MM74C02 |
Top View |
Top View |
MM74C04
Top View
Inverter Hex • Gate NOR Input-2 Quad • Gate NAND Input-2 Quad MM74C04 • MM74C02 • MM74C00
© 1999 Fairchild Semiconductor Corporation |
DS005877.prf |
www.fairchildsemi.com |
MM74C00 • MM74C02 • MM74C04
Absolute Maximum Ratings(Note 1)
Voltage at Any Pin |
−0.3V to VCC + 0.3V |
Operating Temperature Range |
−40°C to +85°C |
Storage Temperature Range |
−65°C to +150°C |
Operating VCC Range |
3.0V to 15V |
Maximum VCC Voltage |
18V |
Power Dissipation (PD) |
|
Dual-In-Line |
700 mW |
Small Outline |
500 mW |
Lead Temperature |
|
(Soldering, 10 seconds) |
300°C |
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.
DC Electrical Characteristics
Min/Max limits apply across the guaranteed temperature range unless otherwise noted
Symbol |
Parameter |
Conditions |
Min |
Typ |
Max |
Units |
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CMOS TO CMOS |
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VIN(1) |
Logical “1” Input Voltage |
VCC = 5.0V |
3.5 |
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V |
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|
VCC = 10V |
8.0 |
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|
V |
VIN(0) |
Logical “0” Input Voltage |
VCC = 5.0V |
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|
1.5 |
V |
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|
VCC = 10V |
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|
2.0 |
V |
VOUT(1) |
Logical “1” Output Voltage |
VCC = 5.0V, IO = −10 μA |
4.5 |
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|
V |
|
|
VCC = 10V, IO = −10 μA |
9.0 |
|
|
V |
VOUT(0) |
Logical “0” Output Voltage |
VCC = 5.0V, IO = 10 μA |
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|
0.5 |
V |
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|
VCC = 10V, IO = 10 μA |
|
|
1.0 |
V |
IIN(1) |
Logical “1” Input Current |
VCC = 15V, VIN = 15V |
|
0.005 |
1.0 |
μA |
IIN(0) |
Logical “0” Input Current |
VCC = 15V, VIN = 0V |
−1.0 |
−0.005 |
|
μA |
ICC |
Supply Current |
VCC = 15V |
|
0.01 |
15 |
μA |
LOW POWER TO CMOS |
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VIN(1) |
Logical “1” Input Voltage |
74C, VCC = 4.75V |
VCC − 1.5 |
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|
V |
VIN(0) |
Logical “0” Input Voltage |
74C, VCC = 4.75V |
|
|
0.8 |
V |
VOUT(1) |
Logical “1” Output Voltage |
74C, VCC = 4.75V, IO = −10 μA |
4.4 |
|
|
V |
VOUT(0) |
Logical “0” Output Voltage |
74C, VCC = 4.75V, IO = 10 μA |
|
|
0.4 |
V |
CMOS TO LOW POWER |
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VIN(1) |
Logical “1” Input Voltage |
74C, VCC = 4.75V |
4.0 |
|
|
V |
VIN(0) |
Logical “0” Input Voltage |
74C, VCC = 4.75V |
|
|
1.0 |
V |
VOUT(1) |
Logical “1” Output Voltage |
74C, VCC = 4.75V, IO = −360 μA |
2.4 |
|
|
V |
VOUT(0) |
Logical “0” Output Voltage |
74C, VCC = 4.75V, IO = 360 μA |
|
|
0.4 |
V |
OUTPUT DRIVE (see Family Characteristics Data Sheet) TA = 25°C (short circuit current) |
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||
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ISOURCE |
Output Source Current |
VCC = 5.0V, VIN(0) = 0V, VOUT = 0V |
−1.75 |
|
|
mA |
ISOURCE |
Output Source Current |
VCC = 10V, VIN(0) = 0V, VOUT = 0V |
−8.0 |
|
|
mA |
ISINK |
Output Sink Current |
VCC = 5.0V, VIN(1) = 5.0V, VOUT = VCC |
1.75 |
|
|
mA |
ISINK |
Output Sink Current |
VCC = 10V, VIN(1) = 10V, VOUT = VCC |
8.0 |
|
|
mA |
AC Electrical Characteristics |
(Note 2) |
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TA = 25°C, CL = 50 pF, unless otherwise specified |
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Symbol |
Parameter |
Conditions |
Min |
Typ |
Max |
Units |
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MM74C00, MM74C02, MM74C04 |
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tpd0, tpd1 |
Propagation Delay Time to |
VCC = 5.0V |
|
50 |
90 |
ns |
|
Logical “1” or “0” |
V CC = 10V |
|
30 |
60 |
ns |
CIN |
Input Capacitance |
(Note 3) |
|
6.0 |
|
pF |
CPD |
Power Dissipation Capacitance |
Per Gate or Inverter (Note 4) |
|
12 |
|
pF |
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note— AN-90.
www.fairchildsemi.com |
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