Integrated Device Technology Inc IDT7024S15PF, IDT7024S17F, IDT7024S17G, IDT7024S17J, IDT7024S17PF Datasheet

HIGH-SPEED	IDT7024S/L
4K x 16 DUAL-PORT
STATIC RAM

Integrated Device Technology, Inc.

FEATURES:

•True Dual-Ported memory cells which allow simultaneous access of the same memory location

•High-speed access

—Military: 20/25/35/55/70ns (max.)

—Commercial: 15/17/20/25/35/55ns (max.)

•Low-power operation

—IDT7024S

Active: 750mW (typ.) Standby: 5mW (typ.)

—IDT7024L

Active: 750mW (typ.) Standby: 1mW (typ.)

•Separate upper-byte and lower-byte control for multiplexed bus compatibility

•IDT7024 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading

more than one device

•M/S = H for BUSY output flag on Master M/S = L for BUSY input on Slave

•Busy and Interrupt Flags

•On-chip port arbitration logic

•Full on-chip hardware support of semaphore signaling between ports

•Devices are capable of withstanding greater than 2001V electrostatic discharge.

•Fully asynchronous operation from either port

•Battery backup operation—2V data retention

•TTL-compatible, single 5V (±10%) power supply

•Available in 84-pin PGA, 84-pin quad flatpack, 84-pin PLCC, and 100-pin Thin Quad Plastic Flatpack

•Industrial temperature range (–40°C to +85°C) is available, tested to military electrical specifications

FUNCTIONAL BLOCK DIAGRAM

NOTES:

1.(MASTER): BUSY is output; (SLAVE): BUSY is input.

2.BUSY outputs and INT outputs are non-tri-stated push-pull.

R/WL				R/WR
UBL				UBR
LBL				LBR
CEL				CER
OEL				OER
I/O8L-I/O15L	I/O		I/O	I/O8R-I/O15R
I/O0L-I/O7L	Control		Control	I/O0R-I/O7R
(1,2)				(1,2)
BUSYL				BUSYR
A11L	Address	MEMORY	Address	A11R
A0L	Decoder	ARRAY	Decoder	A0R
	1 2		1 2
		ARBITRATION
	CEL	INTERRUPT	CER
		SEMAPHORE
	OEL		OER
		LOGIC
	R/WL		R/WR
SEML				SEMR
(2)				(2)
INTL		M/S		INTR
				2740 drw 01

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGES		OCTOBER 1996
©1996 Integrated Device Technology, Inc.	For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.	DSC-2740/6
	6.15	1

IDT7024S/L
HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM	MILITARY AND COMMERCIAL TEMPERATURE RANGES

DESCRIPTION:

The IDT7024 is a high-speed 4K x 16 Dual-Port Static RAM. The IDT7024 is designed to be used as a stand-alone 64K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit or wider memory system applications results in full-speed, errorfree operation without the need for additional discrete logic.

This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by chip enable ( CE ) permits the on-chip circuitry of each port to enter

a very low standby power mode.

Fabricated using IDT’s CMOS high-performance technol ogy, these devices typically operate on only 750mW of power. Low-power (L) versions offer battery backup data retention capability with typical power consumption of 500μW from a 2V battery.

The IDT7024 is packaged in a ceramic 84-pin PGA, an 84pin quad flatpack, an 84-pin PLCC, and a 100-pin TQFP. Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.

PIN CONFIGURATIONS (1,2)

INDEX

I/O7L

I/O6L

I/O5L

I/O4L

I/O3L

I/O2L

GND

I/O1L

I/O0L

OEL

VCC R/WL SEML

CEL UBL LBL N/C A11L A10L A9L

A8L

I/O8L

11 10

9

8

7

6

5

4

3

2

1 84 83 82 81 80 79 78 77 76 75

A7L

12

74

I/O9L

13

73

A6L

I/O10L

14

72

A5L

I/O11L

15

71

A4L

I/O12L

16

70

A3L

I/O13L

17

69

A2L

GND

18

68

A1L

IDT7024

A0L

I/O14L

19

67

J84-1

I/O15L

66

INTL

20

F84-2

VCC

21

84-PIN PLCC /

65

BUSYL

GND

22

64

GND

FLATPACK

I/O0R

23

TOP VIEW (3)

63

M/S

I/O1R

24

62

BUSYR

I/O2R

25

61

INTR

VCC

26

60

A0R

I/O3R

27

59

A1R

I/O4R

28

58

A2R

I/O5R

29

57

A3R

I/O6R

30

56

A4R

I/O7R

31

55

A5R

I/O8R

32

54

A6R

Index

33 34 35 36 37 38 39 40 41 42 43 44 45

46 47 48 49 50 51 52 53

I/O9R

I/O10R

I/O11R

I/O12R

I/O13R

I/O14R

GND

I/O15R

OER R/WR

GND SEMR CER

UBR LBR N/C A11R A10R A9R A8R

A7R

2740 drw 02

N/C

N/C

N/C

N/C

I/O10L

I/O11L

I/O12L

I/O13L

GND

I/O14L

I/O15L

VCC

GND

I/O0R

I/O1R

I/O2R

VCC

I/O3R

I/O4R

I/O5R

I/O6R

N/C

N/C

N/C

N/C

NOTES:

1.All Vcc pins must be connected to the power supply.

2.All GND pins must be connected to the ground supply.

3.This text does not indicate orientation of the actual part-marking.

	I/O9L		I/O8L		I/O7L		I/O6L		I/O5L			I/O4L			I/O3L I/O2L GND							I/O1L			I/O0L			OEL VCC R/WL SEML CEL UBL LBL															N/C		A11L		A10L		A9L		A8L		A7L		A6L
	100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76																																																											N/C
	1																																																						75
	2																																																						74					N/C
	3																																																						73					N/C
	4																																																						72					N/C
	5																																																						71					A5L
	6																																																						70					A4L
	7																																																						69					A3L
	8																																																						68					A2L
	9																																																						67					A1L
	10																											IDT7024																											66					A0L
	11																																																						65					INTL
																												PN100-1
	12																																																						64					BUSYL
	13																											100-PIN																											63					GND
																																																							62					M/S
	14																												TQFP
	15																								TOP VIEW (3)																														61					BUSYR
	16																																																						60					INTR
	17																																																						59					A0R
	18																																																						58					A1R
	19																																																						57					A2R
	20																																																						56					A3R
	21																																																						55					A4R
	22																																																						54					N/C
	23																																																						53					N/C
	24																																																						52					N/C
	25																																																						51					N/C
	26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
																																																										2740 drw 03
	I/O7R		I/O8R		I/O9R		I/O10R		I/O11R			I/O12R			I/O13R I/O14R GND							I/O15R			ROE			R/WR GND SEMR CER UBR LBR N/C															A11R		A10R		A9R		A8R		A7R		A6R		A5R

6.15

2

IDT7024S/L
HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM										MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS (CONT'D) (1,2)
	63	61	60	58	55		54		51	48	46	45	42
11	I/O7L	I/O5L	I/O4L	I/O2L	I/O0L		OEL		SEML	LBL	A11L	A10L	A7L
	66	64	62	59	56		49		50	47	44	43	40
10	I/O10L	I/O8L	I/O6L	I/O3L	I/O1L		UBL		CEL	N/C	A9L	A8L	A5L
	67	65			57		53		52			41	39
09	I/O11L	I/O9L			GND		VCC		R/WL			A6L	A4L
	69	68										38	37
08	I/O13L	I/O12L										A3L	A2L
	72	71	73								33	35	34
07	I/O15L	I/O14L	VCC								BUSYL	A0L	INTL
							IDT7024
	75	70	74				G84-3				32	31	36
06	I/O0R	GND	GND			84-PIN PGA					GND	M/S	A1L
						TOP VIEW(3)
	76	77	78								28	29	30
05	I/O1R	I/O2R	VCC								A0R	INTR	BUSYR
	79	80										26	27
04	I/O3R	I/O4R										A2R	A1R
	81	83			7		11		12			23	25
03	I/O5R	I/O7R			GND		GND		SEMR			A5R	A3R
	82	1	2	5	8		10		14	17	20	22	24
02	I/O6R	I/O9R	I/O10R	I/O13R	I/O15R		R/WR		UBR	A11R	A8R	A6R	A4R
	84	3	4	6	9		15		13	16	18	19	21
01	I/O8R	I/O11R	I/O12R	I/O14R	OER		LBR		CER	N/C	A10R	A9R	A7R
	A	B	C	D	E		F		G	H	J	K	L
														2740 drw 04
Index

NOTES:

1.All Vcc pins must be connected to the power supply.

2.All GND pins must be connected to the ground supply.

3.This text does not indicate orientation of the actual part-marking.

PIN NAMES

Left Port		Right Port	Names
CEL		CER	Chip Enable
R/WL		R/WR	Read/Write Enable
OEL		OER	Output Enable
A0L – A11L		A0R – A11R	Address
I/O0L – I/O15L		I/O0R – I/O15R	Data Input/Output
SEML		SEMR	Semaphore Enable
UBL		UBR	Upper Byte Select
LBL		LBR	Lower Byte Select
INTL		INTR	Interrupt Flag
BUSYL		BUSYR	Busy Flag
	M/S		Master or Slave Select
	VCC		Power
	GND		Ground
			2740 tbl 1

RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE

	Ambient
Grade	Temperature	GND	VCC
Military	–55°C to +125°C	0V	5.0V ± 10%
Commercial	0°C to +70°C	0V	5.0V ± 10%

2740 tbl 02

6.15

3

IDT7024S/L
HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM	MILITARY AND COMMERCIAL TEMPERATURE RANGES

TRUTH TABLE I – NON-CONTENTION READ/WRITE CONTROL

		Inputs(1)				Outputs
CE	R/W	OE	UB	LB	SEM	I/O8-15	I/O0-7	Mode
H	X	X	X	X	H	High-Z	High-Z	Deselected: Power-Down
X	X	X	H	H	H	High-Z	High-Z	Both Bytes Deselected
L	L	X	L	H	H	DATAIN	High-Z	Write to Upper Byte Only
L	L	X	H	L	H	High-Z	DATAIN	Write to Lower Byte Only
L	L	X	L	L	H	DATAIN	DATAIN	Write to Both Bytes
L	H	L	L	H	H	DATAOUT	High-Z	Read Upper Byte Only
L	H	L	H	L	H	High-Z	DATAOUT	Read Lower Byte Only
L	H	L	L	L	H	DATAOUT	DATAOUT	Read Both Bytes
X	X	H	X	X	X	High-Z	High-Z	Outputs Disabled
NOTE:								2740 tbl 03

1. A0L — A11L are not equal to A0R — A11R.

								(1)
TRUTH TABLE II – SEMAPHORE READ/WRITE CONTROL
		Inputs				Outputs
CE	R/W	OE	UB	LB	SEM	I/O8-15	I/O0-7	Mode
H	H	L	X	X	L	DATAOUT	DATAOUT	Read Semaphore Flag Data Out
X	H	L	H	H	L	DATAOUT	DATAOUT	Read Semaphore Flag Data Out
H	u	X	X	X	L	DATAIN	DATAIN	Write I/O0 into Semaphore Flag
X	u	X	H	H	L	DATAIN	DATAIN	Write I/O0 into Semaphore Flag
L	X	X	L	X	L	—	—	Not Allowed
L	X	X	X	L	L	—	—	Not Allowed
NOTE:								2740 tbl 04

1. There are eight semaphore flags written to via I/O0 and read from all of the I/O's (I/O0 - I/O15). These eight semaphores are addressed by A0 - A2.

ABSOLUTE MAXIMUM RATINGS(1)

Symbol	Rating	Commercial	Military	Unit
VTERM(2)	Terminal Voltage	–0.5 to +7.0	–0.5 to +7.0	V
	with Respect
	to GND
TA	Operating	0 to +70	–55 to +125	°C
	Temperature
TBIAS	Temperature	–55 to +125	–65 to +135	°C
	Under Bias
TSTG	Storage	–55 to +125	–65 to +150	°C
	Temperature
IOUT	DC Output	50	50	mA
	Current
NOTES:			2740 tbl 05

1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

2.VTERM must not exceed Vcc +0.5V for more than 25% of the cycle time or 10ns maximum, and is limited to < 20ma for the period over VTERM > Vcc + 0.5V.

RECOMMENDED DC OPERATING

CONDITIONS

Symbol	Parameter	Min.	Typ.	Max.	Unit
VCC	Supply Voltage	4.5	5.0	5.5	V
GND	Supply Voltage	0	0	0	V
VIH	Input High Voltage	2.2	—	6.0(2)	V
VIL	Input Low Voltage	–0.5(1)	—	0.8	V
NOTES:				2740 tbl 06

1.VIL > -1.5V for pulse width less than 10ns.

2.VTERM must not exceed Vcc + 0.5V.

CAPACITANCE(1)

(TA = +25°C, F = 1.0MHZ) TQFP ONLY

Symbol	Parameter	Condition(2)	Max.		Unit
CIN	Input Capacitance	VIN = 3dV	9		pF
COUT	Output Capacitance	VOUT = 3dV	10		pF
NOTES:				2740 tbl 07

1.This parameter are determined by device characterization, but is not production tested.

2.3dV references the interpolated capacitance when the input and output signals switch from 0V to 3V or from 3V to 0V.

6.15

4

IDT7024S/L
HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM	MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER THE

OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE (VCC = 5.0V ± 10%)

			IDT7024S		IDT7024L
Symbol	Parameter	Test Conditions	Min.	Max.	Min.	Max.	Unit
|ILI|	Input Leakage Current(1)	VCC = 5.5V, VIN = 0V to VCC	—	10	—	5	μA
|ILO|	Output Leakage Current	CE = VIH, VOUT = 0V to VCC	—	10	—	5	μA
VOL	Output Low Voltage	IOL = 4mA	—	0.4	—	0.4	V
VOH	Output High Voltage	IOH = -4mA	2.4	—	2.4	—	V
NOTE:							2740 tbl 08

1. At Vcc < 2.0V input leakages are undefined.

DC ELECTRICAL CHARACTERISTICS OVER THE

OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1) (VCC = 5.0V ± 10%)

					7024X15		7024X17		7024X20		7024X25
		Test			Com'l. Only		Com'l. Only
Symbol	Parameter	Condition	Version		Typ.(2)	Max.	Typ.(2)	Max.	Typ.(2) Max.		Typ.(2)Max.			Unit
ICC	Dynamic Operating	CE"A"=VIL, Outputs Open	MIL	S	—	—	—	—	160	370	155	340		mA
	Current	SEM = VIH		L	—	—	—	—	160	320	155	280
	(Both Ports Active)	f = fMAX(3)	COM	S	170	310	170	310	160	290	155	265
				L	170	260	170	260	160	240	155	220
ISB1	Standby Current	CER = CEL = VIH	MIL	S	—	—	—	—	20	90	16	80		mA
	(Both Ports — TTL	SEMR = SEML = VIH		L	—	—	—	—	20	70	16	65
	Level Inputs)	f = fMAX(3)	COM	S	20	60	20	60	20	60	16	60
				L	20	50	20	50	20	50	16	50
ISB2	Standby Current	CE"A"=VIL and CE"B"=VIL(5)	MIL	S	—	—	—	—	95	240	90	215		mA
	(One Port — TTL	Active Port Outputs Open		L	—	—	—	—	95	210	90	180
	Level Inputs)	f = fMAX(3)	COM	S	105	190	105	190	95	180	90	170
		SEMR = SEML = VIH		L	105	160	105	160	95	150	90	140
ISB3	Full Standby Current	Both Ports CEL and	MIL	S	—	—	—	—	1.0	30	1.0	30		mA
	(Both Ports — All	CER >VCC - 0.2V		L	—	—	—	—	0.2	10	0.2	10
	CMOS Level Inputs)	VIN > VCC - 0.2V or	COM	S	1.0	15	1.0	15	1.0	15	1.0	15
		VIN < 0.2V, f = 0(4)		L	0.2	5	0.2	5	0.2	5	0.2	5
		SEMR = SEML> VCC - 0.2V
ISB4	Full Standby Current	CE"A" < 0.2 and	MIL	S	—	—	—	—	90	225	85	200		mA
	(One Port — All	CE"B" > VCC - 0.2V (5)		L	—	—	—	—	90	200	85	170
	CMOS Level Inputs)	SEMR = SEML> VCC - 0.2V
		VIN > VCC - 0.2V or	COM	S	100	170	100	170	90	155	85	145
		VIN < 0.2V, Active Port		L	100	140	100	140	90	130	85	120
		Outputs Open,
		f = fMAX(3)
NOTES:													2740 tbl 09

1."X" in part numbers indicates power rating (S or L).

2.VCC = 5V, TA = +25°C, and are not production tested. ICC DC = 120mA (typ.)

3.At f = fMAX, address and I/O'S are cycling at the maximum frequency read cycle of 1/ tRC, and using “AC Test Conditions” of input levels of GND to 3V.

4.f = 0 means no address or control lines change.

5.Port "A" may be either left or right port. Port "B" is the opposite from port "A".

6.15

5

IDT7024S/L
HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM	MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER THE

OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1)(Cont.) (VCC = 5.0V ± 10%)

					7024X35		7024X55		7024X70
		Test							Mil. Only
Symbol	Parameter	Condition	Version		Typ.(2)	Max.	Typ.(2)	Max.	Typ.(2)	Max.	Unit
ICC	Dynamic Operating	CE = VIL, Outputs Open	MIL.	S	150	300	150	300	140	300	mA
	Current	SEM = VIH		L	150	250	150	250	140	250
		f = fMAX(3)
	(Both Ports Active)		COM’L.	S	150	250	150	250	—	—
				L	150	210	150	210	—	—
ISB1	Standby Current	CEL = CER = VIH	MIL.	S	13	80	13	80	10	80	mA
	(Both Ports — TTL	SEMR = SEML = VIH		L	13	65	13	65	10	65
		f = fMAX(3)
	Level Inputs)		COM’L.	S	13	60	13	60	—	—
				L	13	50	13	50	—	—
ISB2	Standby Current	CE"A"=VIL and CE"B"=VIH(5)	MIL.	S	85	190	85	190	80	190	mA
	(One Port — TTL	Active Port Outputs Open		L	85	160	85	160	80	160
		f = fMAX(3)
	Level Inputs)		COM’L.	S	85	155	85	155	—	—
		SEMR = SEML = VIH		L	85	130	85	130	—	—
ISB3	Full Standby Current	Both Ports CEL and	MIL.	S	1.0	30	1.0	30	1.0	30	mA
	(Both Ports — All	CER > VCC - 0.2V		L	0.2	10	0.2	10	0.2	10
	CMOS Level Inputs)	VIN > VCC - 0.2V or	COM’L.	S	1.0	15	1.0	15	—	—
		VIN < 0.2V, f = 0(4)		L	0.2	5	0.2	5	—	—
		SEMR = SEML > VCC - 0.2V
ISB4	Full Standby Current	CE"A" < 0.2 and	MIL.	S	80	175	80	175	75	175	mA
	(One Port — All	CE"B" > VCC - 0.2V(5)		L	80	150	80	150	75	150
	CMOS Level Inputs)	SEMR = SEML > VCC - 0.2V
		VIN > VCC - 0.2V or	COM’L.	S	80	135	80	135	—	—
		VIN < 0.2V,		L	80	110	80	110	—	—
		Active Port Outputs Open,
		f = fMAX(3)
NOTES:										2740 tbl 10

1."X" in part numbers indicates power rating (S or L).

2.VCC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA (typ.)

3.At f = fMAX, address and I/O'S are cycling at the maximum frequency read cycleof 1/tRC, and using “AC Test Conditions”of input levels of GND to 3V.

4.f = 0 means no address or control lines change.

5.Port "A" may be either left or right port. Port "B" is the opposite from port "A".

DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES (L Version Only)

(VLC = 0.2V, VHC = VCC - 0.2V)(4)

Symbol	Parameter	Test Condition			Min.	Typ.(1)	Max.	Unit
VDR	VCC for Data Retention	VCC = 2V			2.0	—	—	V
ICCDR	Data Retention Current	CE > VHC	MIL.		—	100	4000	μA
		VIN > VHC or < VLC
			COM’L.		—	100	1500
tCDR(3)
	Chip Deselect to Data Retention Time	SEM > VHC			0	—	—	ns
tR(3)	Operation Recovery Time				tRC(2)	—	—	ns
NOTES:								2740 tbl 11

1.TA = +25°C, VCC = 2V, and are by characterization but are not production tested.

2.tRC = Read Cycle Time

3.This parameter is guaranteed by device characterization but are not production tested.

4. At Vcc < 2.0V, input leakages are not defined.

DATA RETENTION WAVEFORM		DATA RETENTION MODE
VCC	4.5V	VDR ³ 2V	4.5V
	tCDR		tR
CE	VIH	VDR	VIH
			2740 drw 05

6.15

6