Integrated Device Technology Inc IDT7027L20G, IDT7027L20PF, IDT7027L25G, IDT7027L25GB, IDT7027L25PF Datasheet

						HIGH-SPEED	IDT7027S/L
						32K x 16 DUAL-PORT
						STATIC RAM

Features

True Dual-Ported memory cells which allow simultaneous access of the same memory location

High-speed access

–Military: 25/35/55ns (max)

–Industrial: 25ns (max.)

–Commercial: 20/25/35/55ns (max.)

Low-power operation

–IDT7027S

Active: 750mW (typ.) Standby: 5mW (typ.)

–IDT7027L

Active: 750mW (typ.) Standby: 1mW (typ.)

Separate upper-byte and lower-byte control for bus matching capability.

Dual chip enables allow for depth expansion without

external logic

IDT7027 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device

M/S = VIH for BUSY output flag on Master, M/S = VIL for BUSY input on Slave

Busy and Interrupt Flags

On-chip port arbitration logic

Full on-chip hardware support of semaphore signaling between ports

Fully asynchronous operation from either port

TTL-compatible, single 5V (±10%) power supply

Available in 100-pin Thin Quad Flatpack (TQFP) and 108-pin Ceramic Pin Grid Array (PGA)

Industrial temperature range (–40°C to +85°C) is available for selected speeds

Functional Block Diagram

R/WL	R/WR
UBL	UBR
CE0L	CE0R
CE1L	CE1R
OEL	OER

LBL

LBR

	I/O 8-15L		I/O	I/O	I/O8-15R
	I/O 0-7L		Control	Control	I/O0-7R
	BUSYL(1,2)				BUSYR(1,2)
					.
	A14L	Address	32Kx16	Address	A14R
			MEMORY
	A0L	Decoder	ARRAY	Decoder	A0R
			7027
		A14L		A14R
		A0L	ARBITRATION	A0R
		CE0L	INTERRUPT	CE0R
		CE1L	SEMAPHORE	CE1R
		OEL	LOGIC	OER
		R/WL		R/WR
	SEML				SEMR
	(2)				INTR (2)
	INTL		M/S(2)
	NOTES:				3199 drw 01

1.BUSY is an input as a Slave (M/S=VIL) and an output as a Master (M/S=VIH).

2.BUSY and INT are non-tri-state totem-pole outputs (push-pull).

MAY 2000

1

©2000 IntegratedDevice Technology,Inc.

DSC 3199/7

IDT7027S/L
High-Speed 32K x 16 Dual-Port Static RAM	Military, Industrial and Commercial Temperature Ranges

Description

The IDT7027 is a high-speed 32K x 16 Dual-Port Static RAM, designed to be used as a stand-alone 512K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit-or-more word systems.UsingtheIDTMASTER/SLAVEDual-PortRAMapproachin32- bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic.

The device provides two independent ports with separate control, address,andI/Opinsthatpermit independent,asynchronousaccessfor reads or writes to any location in memory. An automatic power down feature controlled by the chip enables (CE0 and CE1) permits the on-chip

circuitry of each port to enter a very low standby power mode. Fabricated using IDT’s CMOS high-performance technology, these

devices typically operate on only 750mW of power. The IDT7027 is packagedina100-pinThinQuadFlatpack(TQFP)anda108-pinceramic Pin Grid Array (PGA).

Military grade product is manufactured in compliance with the latest revision of MIL-PRF-38535 QML, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.

Pin Configurations(1,2,3)

INDEX

A8L

A7L

A6L

A5L

A4L

A3L

A2L

A1L

A0L

NC INTL

BUSYL

GND SM/ BUSYR

INTR

A0R

A1R

A2R

A3R

A4R

A5R

A6R

A7R

A8R

A9L			100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77																																																					76					A9R
			1																																																					75
A10L			2																																																					74					A10R
A11L			3																																																					73					A11R
A12L			4																																																					72					A12R
A13L			5																																																					71					A13R
A14L			6																																																					70					A14R
NC			7																																																					69					NC
NC			8																																																					68					NC
NC			9																																																					67					NC
LBL			10																				IDT7027PF																																	66					LBR
UBL			11																																																					65					UBR
																							PN100-1(4)
CE0L			12																																																					64					CE0R
CE1L			13																			100-Pin TQFP																																		63					CE1R
SEML			14																																																					62					SEMR
																							Top View(5)
Vcc			15																																																					61					GND
R/WL			16																																																					60					R/WR
OEL			17																																																					59					OER
GND			18																																																					58					GND
GND			19																																																					57					GND
I/O15L			20																																																					56					I/O15R
I/O14L			21																																																					55					I/O14R
I/O13L			22																																																					54					I/O13R
I/O12L			23																																																					53					I/O12R
I/O11L			24																																																					52					I/O11R
I/O10L			25																													40 41					42 43 44 45 46											47 48								51					I/O10R
			26 27 28 29 30 31 32 33 34 35 36 37 38 39																																																		49 50						.
																																																											3199 drw 02
			I/O9L			I/O8L		Vcc I/OL7 I/O6L I/O5L I/O4L										I/O3L		I/O2L		GND I/O1L I/O0L GND I/O0R										I/O1R I/O2R					I/O3R I/O4R I/O5R I/O6R Vcc												I/O7R I/O8R					I/O9R			NC

NOTES:

1.All VCC pins must be connected to power supply.

2.All GND pins must be connected to ground supply.

3.Package body is approximately 14mm x 14mm x 1.4mm.

4.This package code is used to reference the package diagram.

5.This text does not indicate orientation of the actual part-marking.

6.242

IDT7027S/L
High-Speed 32K x 16 Dual-Port Static RAM								Military, Industrial and Commercial Temperature Ranges
Pin Configurations(1,2,3) (con't.)
	81	80	77	74	72	69	68	65	63	60	57	54
12	A10R	A11R	A14R	NC	UBR	SEMR	GND	GND	NC	I/O13R	I/O10R	NC
	84	83	78	76	73	70	67	64	61	59	56	53
11	A7R	A8R	A13R	NC	LBR	CE1R	R/WR	GND	I/O14R	I/O12R	I/O9R	NC
	87	86	82	79	75	71	66	62	58	55	51	50
10	A4R	A5R	A9R	A12R	NC	CE0R	OER	I/O15R	I/O11R	NC	I/O8R	I/O7R
	90	88	85							52	49	47
09	A1R	A3R	A6R							NC	Vcc	I/O5R
	92	91	89							48	46	45
08	INTR	A0R	A2R							I/O6R	I/O4R	I/O3R
	95	94	93							44	43	42
07	GND	M/S	BUSYR			IDT7027G				I/O2R	I/O1R	I/O0R
						G108-1(4)
	96	97	98							39	40	41
06	BUSYL	INTL	NC			108-Pin PGA				I/O1L	I/O0L	GND
						Top View(5)
	99	100	102							35	37	38
05	A0L	A1L	A3L							I/O4L	I/O2L	GND
	101	103	106							31	34	36
04	A2L	A4L	A7L							Vcc	I/O5L	I/O3L
	104	105	1	4	8	12	17	21	25	28	32	33
03	A5L	A6L	A10L	A13L	NC	CE1L	GND	I/O14L	I/O10L	NC	I/O7L	I/O6L
	107	2	5	7	10	13	16	19	22	24	29	30
02	A8L	A11L	A14L	NC	UBL	SEML	OEL	GND	I/O13L	I/O11L	NC	I/O8L
	108	3	6	9	11	14	15	18	20	23	26	27
01	A9L	A12L	NC	LBL	CE0L	Vcc	R/WL	NC	I/O15L	I/O12L	I/O9L	NC
													.
	A	B	C	D	E	F	G	H	J	K	L	M
												3199 drw 03

INDEX

NOTES:

1.All VCC pins must be connected to power supply.

2.All GND pins must be connected to ground supply.

3.Package body is approximately 1.21 in x 1.21 in x .16 in.

4.This package code is used to reference the package diagram.

5.This text does not indicate orientation of the actual part-marking.

Pin Names

Left Port		Right Port	Names
CE0L, CE1L		CE0R, CE1R	Chip Enables
R/WL		R/WR	Read/Write Enable
OEL		OER	Output Enable
A0L - A14L		A0R - A14R	Address
I/O0L - I/O15L		I/O0R - I/O15R	Data Input/Output
SEML		SEMR	Semaphore Enable
UBL		UBR	Upper Byte Select
LBL		LBR	Lower Byte Select
INTL		INTR	Interrupt Flag
BUSYL		BUSYR	Busy Flag
	M/S		Master or Slave Select
	VCC		Power
	GND		Ground

3199 tbl 01

6.342

IDT7027S/L
High-Speed 32K x 16 Dual-Port Static RAM	Military, Industrial and Commercial Temperature Ranges

Truth Table I – Chip Enable

	CE		CE0	CE1	Mode
			VIL	VIH	Po rt Se le cte d	(TTL Active )
	L
		<	0.2V	> VCC -0.2V	Po rt Se le cte d	(CM OS A ctive )
			VIH	X	Po rt De se le cte d		(TTL Inactive )
			X	VIL	Po rt De se le cte d		(TTL Inactive )
	H
		> VCC -0.2V		X	Po rt De se le cte d		(CM OS Inactive )
			X	< 0.2V	Po rt De se le cte d		(CM OS Inactive )

NOTES:

1.Chip Enable references are shown above with the actual CE0

2.Port "A" and "B" references are located where CE is used.

3."H" = VIH and "L" = VIL.

3199 tbl 02

and CE1 levels, CE is a reference only.

Truth Table II – Non-Contention Read/Write Control

		Inputs(1)					Outputs
CE(2)	R/W	OE		UB	LB	SEM	I/O8-15	I/O0-7	Mode
H	X	X		X	X	H	High-Z	High-Z	Deselected: Power-Down
X	X	X		H	H	H	High-Z	High-Z	Both Bytes Deselected
L	L	X		L	H	H	DATAIN	High-Z	Write to Upper Byte Only
L	L	X		H	L	H	High-Z	DATAIN	Write to Lower Byte Only
L	L	X		L	L	H	DATAIN	DATAIN	Write to Both Bytes
L	H	L		L	H	H	DATAOUT	High-Z	Read Upper Byte Only
L	H	L		H	L	H	High-Z	DATAOUT	Read Lower Byte Only
L	H	L		L	L	H	DATAOUT	DATAOUT	Read Both Bytes
X	X	H		X	X	X	High-Z	High-Z	Outputs Disabled

NOTES:	3199 tbl 03

1.A0L — A14L ≠ A0R — A14R.

2.Refer to Chip Enable Truth Table.

Truth Table III – Semaphore Read/Write Control

		Inputs(1)						Outputs
CE(2)	R/W	OE		UB		LB	SEM	I/O8-15	I/O0-7	Mode
H	H	L		X		X	L	DATAOUT	DATAOUT	Read Data in Semaphore Flag
X	H	L		H		H	L	DATAOUT	DATAOUT	Read Data in Semaphore Flag
H	↑	X		X		X	L	DATAIN	DATAIN	Write I/O0 into Semaphore Flag
X	↑	X		H		H	L	DATAIN	DATAIN	Write I/O0 into Semaphore Flag
L	X	X		L		X	L	______	______	Not Allowed
L	X	X		X		L	L	______	______	Not Allowed
NOTES:										3199 tbl 04
1. There are eight semaphore flags written to via I/O0						and read from all the I/Os (I/O0 __I/O15). These eight semaphore flags are addressed by A0-A2.
2. Refer to Chip Enable Truth Table.

6.42

IDT7027S/L
High-Speed 32K x 16 Dual-Port Static RAM	Military, Industrial and Commercial Temperature Ranges

Absolute Maximum Ratings(1,3)

Symbol	Rating	Commercial	Military	Unit
		& Industrial
VTERM(2)	Terminal Voltage	-0.5 to +7.0	-0.5 to +7.0	V
	with Respect
	to GND
TBIAS	Temperature	-55 to +125	-65 to +135	oC
	Under Bias
TSTG	Storage	-65 to +150	-65 to +150	oC
	Temperature
IOUT	DC Output	50	50	mA
	Current
NOTES:				3199 tbl 05

1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

2.VTERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of VTERM > Vcc + 10%.

RecommendedDC Operating

Conditions

Symbol	Parameter	Min.	Typ.	Max.	Unit
VCC	Supply Voltage	4.5	5.0	5.5	V
GND	Ground	0	0	0	V
VIH	Input High Voltage	2.2	____	6.0(2)	V
VIL	Input Low Voltage	-0.5(1)	____	0.8	V

3199 tbl 07

NOTES:

1.VIL > -1.5V for pulse width less than 10ns.

2.VTERM must not exceed Vcc + 10%.

Maximum Operating

Temperature and Supply Voltage(1)

	Ambient
Grade	Temperature	GND	Vcc
Military	-55OC to+125OC	0V	5.0V + 10%
Commercial	0OC to +70OC	0V	5.0V + 10%
Industrial	-40OC to +85OC	0V	5.0V + 10%

3199 tbl 06

NOTES:

1.This is the parameter TA. This is the "instant on" case temperature.

2.Industrial temperature: for other speeds packages and powers, contact your sales office.

Capacitance(1)

(TA = +25°C, f = 1.0mhz) TQFP ONLY

Symbol	Parameter	Conditions(2)	Max.	Unit
CIN	Input Capacitance	VIN = 3dV	9	pF
COUT	Output	VOUT = 3dV	10	pF
	Capacitance

3199 tbl 08

NOTES:

1.This parameter is determined by device characterization but is not production tested.

2.3dV represents the interpolated capacitance when the input and output signals switch from 0V to 3V or from 3V to 0V.

DC Electrical Characteristics Over the Operating

Temperature and Supply Voltage Range (VCC = 5.0V ± 10%)

				7027S			7027L
Symbol	Parameter	Test Conditions	Min.		Max.	Min.		Max.	Unit
|ILI|	Input Leakage Current(1)	VCC = 5.5V, VIN = 0V to VCC	___		10	___		5	µ A
|ILO|	Output Leakage Current	CE = VIH, VOUT = 0V to VCC	___		10	___		5	µ A
VOL	Output Low Voltage	IOL = 4mA	___		0.4	___		0.4	V
VOH	Output High Voltage	IOH = -4mA	2.4		___	2.4		___	V

3199 tbl 09

NOTE:

1. At Vcc < 2.0V, input leakages are undefined.

6.542

IDT7027S/L
High-Speed 32K x 16 Dual-Port Static RAM	Military, Industrial and Commercial Temperature Ranges

DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(1,6,7) (VCC = 5.0V ± 10%)

					7027X20		7027X25		7027X35		7027X55
					Com'l Only		Com'l, Ind		Com'l &		Com'l &
							& Military		Military		Military
Symbol	Parameter	Test Condition	Version		Typ.(2)	Max.	Typ.(2)	Max.	Typ.(2)	Max.	Typ.(2)	Max.		Unit
ICC	Dynamic Operating	CE = VIL, Outputs Disabled	COM'L	S	185	325	180	305	160	295	150	270		mA
	Current	SEM = VIH		L	185	285	170	265	160	255	150	230
	(Both Ports Active)	f = fMAX(3)
			MIL &	S	____	____	170	345	160	335	150	310
			IND	L	____	____	170	305	160	295	150	270
ISB1	Standby Current	CEL = CER = VIH	COM'L	S	55	90	40	85	30	85	20	85		mA
	(Both Ports - TTL Level	SEMR = SEML = VIH		L	55	70	40	60	30	60	20	60
	Inputs)	f = fMAX(3)
			MIL &	S	____	____	40	100	30	100	20	100
			IND	L	____	____	40	80	30	80	20	80
ISB2	Standby Current	CE"A" = VIL and CE"B" = VIH(5)	COM'L	S	120	215	105	200	95	185	85	165		mA
	(One Port - TTL Level	Active Port Outputs Disabled,		L	120	185	105	170	95	155	85	135
	Inputs)	f=fMAX(3)
			MIL &	S			105	230	95	215	85	195
		SEMR = SEML = VIH			____	____
			IND	L	____	____	105	200	95	185	85	165
ISB3	Full Standby Current	Both Ports CEL and	COM'L	S	1.0	15	1.0	15	1.0	15	1.0	15		mA
	(Both Ports - All CMOS	CER > VCC - 0.2V		L	0.2	5	0.2	5	0.2	5	0.2	5
	Level Inputs)	VIN > VCC - 0.2V or
		VIN < 0.2V, f = 0(4)	MIL &	S	____	____	1.0	30	1.0	30	1.0	30
		SEMR = SEML > VCC - 0.2V	IND	L	____	____	0.2	10	0.2	10	0.2	10
ISB4	Full Standby Current	CE"A" < 0.2V and	COM'L	S	115	190	100	170	90	160	80	135		mA
	(One Port - All CMOS	CE"B" > VCC - 0.2V(5)		L	115	160	100	145	90	135	80	110
	Level Inputs)	SEMR = SEML > VCC - 0.2V
		VIN > VCC - 0.2V or	MIL &	S	____	____	100	200	90	190	80	175
		VIN < 0.2V, Active Port Outputs
			IND	L	____	____	100	175	90	165	80	150
		(3)
		Disable d, f = fMAX
NOTES:													3199 tbl 10

1.'X' in part numbers indicates power rating (S or L).

2.VCC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA (Typ.)

3.At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/ tRC, and using “AC Test Conditions” of input levels of GND to 3V.

4.f = 0 means no address or control lines change.

5.Port "A" may be either left or right port. Port "B" is the opposite from port "A".

6.Refer to Chip Enable Truth Table.

7.Industrial temperature: for other speeds, packages and powers contact your sales office.

6.642